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author | Arnd Bergmann <arnd@arndb.de> | 2019-02-15 17:16:17 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2019-02-15 17:16:45 +0100 |
commit | 59f527dd7a6191734f7c2049f045cbcac290efa8 (patch) | |
tree | 869102cc0060ad8d24185bf9b691da23b1284b6d /Documentation/devicetree/bindings/reset | |
parent | 57f87c7989d2ceda9fbbfb838bd50f9879038fd7 (diff) | |
parent | e23d9c6d0d4912fab12cd2d56070b0a8199772f0 (diff) | |
download | linux-59f527dd7a6191734f7c2049f045cbcac290efa8.tar.bz2 |
Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers
arm64: zynqmp: SoC changes for v5.1
- Extend firmware interface with reset, nvmem,
power management and power domain support
- Add reset, nvmem driver, power management and
power domain drivers
-
* tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
drivers: soc: xilinx: Add ZynqMP power domain driver
firmware: xilinx: Add APIs to control node status/power
dt-bindings: power: Add ZynqMP power domain bindings
drivers: soc: xilinx: Add ZynqMP PM driver
firmware: xilinx: Implement ZynqMP power management APIs
dt-bindings: soc: Add ZynqMP PM bindings
nvmem: zynqmp: Added zynqmp nvmem firmware driver
dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
firmware: xilinx: Add zynqmp_pm_get_chipid() API
reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
dt-bindings: reset: Add bindings for ZynqMP reset driver
firmware: xilinx: Add reset API's
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/reset')
-rw-r--r-- | Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt new file mode 100644 index 000000000000..27a45fe5ecf1 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt @@ -0,0 +1,52 @@ +-------------------------------------------------------------------------- + = Zynq UltraScale+ MPSoC reset driver binding = +-------------------------------------------------------------------------- +The Zynq UltraScale+ MPSoC has several different resets. + +See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information +about zynqmp resets. + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +Required Properties: +- compatible: "xlnx,zynqmp-reset" +- #reset-cells: Specifies the number of cells needed to encode reset + line, should be 1 + +------- +Example +------- + +firmware { + zynqmp_firmware: zynqmp-firmware { + compatible = "xlnx,zynqmp-firmware"; + method = "smc"; + + zynqmp_reset: reset-controller { + compatible = "xlnx,zynqmp-reset"; + #reset-cells = <1>; + }; + }; +}; + +Specifying reset lines connected to IP modules +============================================== + +Device nodes that need access to reset lines should +specify them as a reset phandle in their corresponding node as +specified in reset.txt. + +For list of all valid reset indicies see +<dt-bindings/reset/xlnx-zynqmp-resets.h> + +Example: + +serdes: zynqmp_phy@fd400000 { + ... + + resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; + reset-names = "sata_rst"; + + ... +}; |