diff options
author | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2021-07-18 13:40:50 +0200 |
---|---|---|
committer | Rob Herring <robh@kernel.org> | 2021-07-19 15:55:34 -0600 |
commit | 320e10986ef7eda166891493d1f6ff1564dd6275 (patch) | |
tree | dd5f5908fc2c090b188af2f5f4941c86a5b7920c /Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt | |
parent | 0f8b97d8f6021c525bc5fa7e4927401a39086c9f (diff) | |
download | linux-320e10986ef7eda166891493d1f6ff1564dd6275.tar.bz2 |
dt-bindings: PCI: update references to Designware schema
Now that its contents were converted to a DT schema, replace
the references for the old file on existing properties.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Link: https://lore.kernel.org/r/dfff4d94631546c53450d1baeddc694dd26b5c36.1626608375.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt')
-rw-r--r-- | Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt index bd43f3c3ece4..6a99d2aa8075 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt @@ -1,7 +1,8 @@ NVIDIA Tegra PCIe controller (Synopsys DesignWare Core based) This PCIe controller is based on the Synopsis Designware PCIe IP -and thus inherits all the common properties defined in designware-pcie.txt. +and thus inherits all the common properties defined in snps,dw-pcie.yaml and +snps,dw-pcie-ep.yaml. Some of the controller instances are dual mode where in they can work either in root port mode or endpoint mode but one at a time. @@ -22,7 +23,7 @@ Required properties: property. - reg-names: Must include the following entries: "appl": Controller's application logic registers - "config": As per the definition in designware-pcie.txt + "config": As per the definition in snps,dw-pcie.yaml "atu_dma": iATU and DMA registers. This is where the iATU (internal Address Translation Unit) registers of the PCIe core are made available for SW access. |