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author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-03-13 11:30:16 +0100 |
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committer | Boris Brezillon <boris.brezillon@bootlin.com> | 2018-03-29 09:38:10 +0200 |
commit | 961ba15c48dd465fdbef1b9379bd8031c374d62e (patch) | |
tree | 91411b075870319503c3467fd6b49edd61a9cf2f /Documentation/devicetree/bindings/mtd | |
parent | b1206122069aadabe1a8c50789277a978aaa4df7 (diff) | |
download | linux-961ba15c48dd465fdbef1b9379bd8031c374d62e.tar.bz2 |
mtd: rawnand: marvell: Fix clock resource by adding a register clock
On Armada 7K/8K we need to explicitly enable the register clock. This
clock is optional because not all the SoCs using this IP need it but at
least for Armada 7K/8K it is actually mandatory.
The binding documentation is updated accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/marvell-nand.txt | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mtd/marvell-nand.txt b/Documentation/devicetree/bindings/mtd/marvell-nand.txt index c08fb477b3c6..e0c790706b9b 100644 --- a/Documentation/devicetree/bindings/mtd/marvell-nand.txt +++ b/Documentation/devicetree/bindings/mtd/marvell-nand.txt @@ -14,7 +14,10 @@ Required properties: - #address-cells: shall be set to 1. Encode the NAND CS. - #size-cells: shall be set to 0. - interrupts: shall define the NAND controller interrupt. -- clocks: shall reference the NAND controller clock. +- clocks: shall reference the NAND controller clocks, the second one is + is only needed for the Armada 7K/8K SoCs +- clock-names: mandatory if there is a second clock, in this case there + should be one clock named "core" and another one named "reg" - marvell,system-controller: Set to retrieve the syscon node that handles NAND controller related registers (only required with the "marvell,armada-8k-nand[-controller]" compatibles). |