diff options
author | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-11-14 10:03:15 +0100 |
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committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-11-17 21:59:33 +0100 |
commit | 74f4d7974d2fc88fa39538c0748a2e44ae6c8b9d (patch) | |
tree | b79690dfe63360a5dc527eb84e755fb36557dde3 /Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml | |
parent | d963af0b23ca4a72d913b0ce56ce5e270dcfa00f (diff) | |
download | linux-74f4d7974d2fc88fa39538c0748a2e44ae6c8b9d.tar.bz2 |
dt-bindings: mtd: Standardize the style in the examples
As recently requested by the binding maintaines, let's use 4 spaces in
the examples.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20221114090315.848208-18-miquel.raynal@bootlin.com
Diffstat (limited to 'Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml b/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml index 023f3ef0fa13..e552875040e2 100644 --- a/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml +++ b/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml @@ -34,20 +34,20 @@ unevaluatedProperties: false examples: - | smcc: memory-controller@e000e000 { - compatible = "arm,pl353-smc-r2p1", "arm,primecell"; - reg = <0xe000e000 0x0001000>; - clock-names = "memclk", "apb_pclk"; - clocks = <&clkc 11>, <&clkc 44>; - ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */ - 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */ - 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ - #address-cells = <2>; - #size-cells = <1>; - - nfc0: nand-controller@0,0 { - compatible = "arm,pl353-nand-r2p1"; - reg = <0 0 0x1000000>; - #address-cells = <1>; - #size-cells = <0>; - }; + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; + reg = <0xe000e000 0x0001000>; + clock-names = "memclk", "apb_pclk"; + clocks = <&clkc 11>, <&clkc 44>; + ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */ + 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */ + 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ + #address-cells = <2>; + #size-cells = <1>; + + nfc0: nand-controller@0,0 { + compatible = "arm,pl353-nand-r2p1"; + reg = <0 0 0x1000000>; + #address-cells = <1>; + #size-cells = <0>; + }; }; |