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authorThierry Reding <treding@nvidia.com>2021-12-13 17:21:46 +0100
committerThierry Reding <treding@nvidia.com>2021-12-16 16:43:49 +0100
commit8c970e7ee7ae9c41aa2432f234c7b382391200f2 (patch)
tree2ebca792275943afd354f97a3c3255334555e263 /Documentation/devicetree/bindings/memory-controllers
parentfc5e0e37621973758e7e49dd85f28673e72e4b85 (diff)
downloadlinux-8c970e7ee7ae9c41aa2432f234c7b382391200f2.tar.bz2
dt-bindings: memory: tegra: Update for Tegra194
The #interconnect-cells properties are required to hook up memory clients to the MC/EMC in interconnects properties. Add a description for these properties. For the nested EMC controller, the list of required properties was missing. Add it so that the validation can be more strict. Also, allow multiple reg entries required by Tegra194 and later. While at it, also remove the dummy BPMP node from the example because it is incomplete and fails validation. It's also not necessary for this file and the BPMP DT schema already has a full example. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
-rw-r--r--Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml78
1 files changed, 67 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
index 611bda38d187..b496564b1bdf 100644
--- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
@@ -33,10 +33,12 @@ properties:
- nvidia,tegra194-mc
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 3
interrupts:
- maxItems: 1
+ items:
+ - description: MC general interrupt
"#address-cells":
const: 2
@@ -48,6 +50,9 @@ properties:
dma-ranges: true
+ "#interconnect-cells":
+ const: 1
+
patternProperties:
"^external-memory-controller@[0-9a-f]+$":
description:
@@ -65,10 +70,12 @@ patternProperties:
- nvidia,tegra194-emc
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
interrupts:
- maxItems: 1
+ items:
+ - description: EMC general interrupt
clocks:
items:
@@ -78,11 +85,65 @@ patternProperties:
items:
- const: emc
+ "#interconnect-cells":
+ const: 0
+
nvidia,bpmp:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle of the node representing the BPMP
+ allOf:
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra186-emc
+ then:
+ properties:
+ reg:
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra194-emc
+ then:
+ properties:
+ reg:
+ minItems: 2
+
+ additionalProperties: false
+
+ required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - "#interconnect-cells"
+ - nvidia,bpmp
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra186-mc
+ then:
+ properties:
+ reg:
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ const: nvidia,tegra194-mc
+ then:
+ properties:
+ reg:
+ minItems: 3
+
+additionalProperties: false
+
required:
- compatible
- reg
@@ -90,8 +151,6 @@ required:
- "#address-cells"
- "#size-cells"
-additionalProperties: false
-
examples:
- |
#include <dt-bindings/clock/tegra186-clock.h>
@@ -124,12 +183,9 @@ examples:
clocks = <&bpmp TEGRA186_CLK_EMC>;
clock-names = "emc";
+ #interconnect-cells = <0>;
+
nvidia,bpmp = <&bpmp>;
};
};
};
-
- bpmp: bpmp {
- compatible = "nvidia,tegra186-bpmp";
- #clock-cells = <1>;
- };