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authorBartosz Golaszewski <bgolaszewski@baylibre.com>2016-10-31 15:45:34 +0100
committerSekhar Nori <nsekhar@ti.com>2016-11-14 17:18:34 +0530
commit62a8a73923edf97cdc4997a99065045743caddf1 (patch)
tree02a328bf6067eaa11326784f3e04fb0e3dbafab3 /Documentation/devicetree/bindings/memory-controllers
parent1001354ca34179f3db924eb66672442a173147dc (diff)
downloadlinux-62a8a73923edf97cdc4997a99065045743caddf1.tar.bz2
memory: davinci: add support for da8xx DDR2/mDDR controller
Create a new driver for the da8xx DDR2/mDDR controller and implement support for writing to the Peripheral Bus Burst Priority Register. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> [nsekhar@ti.com: subject line adjustment] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
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+* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller
+
+The DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features
+a set of registers which allow to tweak the controller's behavior.
+
+Documentation:
+OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf
+
+Required properties:
+
+- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards
+- reg: a tuple containing the base address of the memory
+ controller and the size of the memory area to map
+
+Example for da850 shown below.
+
+ddrctl {
+ compatible = "ti,da850-ddr-controller";
+ reg = <0xb0000000 0xe8>;
+};