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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2015-09-07 08:05:39 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@osg.samsung.com> | 2016-02-19 09:32:49 -0200 |
| commit | 7f2d50f8da43fde0c883c378fd81f64c8bca74eb (patch) | |
| tree | b73155aef9573d96cd1afae79d2f9793a1f94364 /Documentation/devicetree/bindings/media/renesas,vsp1.txt | |
| parent | 7b4baddca69e61cdbabe8caff614778d188d89d8 (diff) | |
| download | linux-7f2d50f8da43fde0c883c378fd81f64c8bca74eb.tar.bz2 | |
[media] v4l: vsp1: Add support for the R-Car Gen3 VSP2
Add DT compatible strings for the VSP2 instances found in the R-Car Gen3
SoCs and support them in the vsp1 driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/media/renesas,vsp1.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/media/renesas,vsp1.txt | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.txt b/Documentation/devicetree/bindings/media/renesas,vsp1.txt index 674c8c30d046..fe74fb38e4d5 100644 --- a/Documentation/devicetree/bindings/media/renesas,vsp1.txt +++ b/Documentation/devicetree/bindings/media/renesas,vsp1.txt @@ -1,24 +1,26 @@ -* Renesas VSP1 Video Processing Engine +* Renesas VSP Video Processing Engine -The VSP1 is a video processing engine that supports up-/down-scaling, alpha +The VSP is a video processing engine that supports up-/down-scaling, alpha blending, color space conversion and various other image processing features. It can be found in the Renesas R-Car second generation SoCs. Required properties: - - compatible: Must contain "renesas,vsp1" + - compatible: Must contain one of the following values + - "renesas,vsp1" for the R-Car Gen2 VSP1 + - "renesas,vsp2" for the R-Car Gen3 VSP2 - - reg: Base address and length of the registers block for the VSP1. - - interrupts: VSP1 interrupt specifier. - - clocks: A phandle + clock-specifier pair for the VSP1 functional clock. + - reg: Base address and length of the registers block for the VSP. + - interrupts: VSP interrupt specifier. + - clocks: A phandle + clock-specifier pair for the VSP functional clock. - - renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1. - - renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1. + - renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP. + - renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP. Optional properties: - - renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1. Defaults + - renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP. Defaults to 0 if not present. - renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is available. |