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author | Sam Protsenko <semen.protsenko@linaro.org> | 2021-12-04 23:58:13 +0200 |
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committer | Wolfram Sang <wsa@kernel.org> | 2021-12-09 10:02:09 +0100 |
commit | 5ae451148eba181b71575a88fa344fe09a840cf3 (patch) | |
tree | 4d8c08d7bd10e859cd11e74c5bc43062a3d306ad /Documentation/devicetree/bindings/i2c/i2c-exynos5.txt | |
parent | 92ae3162840072b24ad1c4e3abf3c3d6bd012dee (diff) | |
download | linux-5ae451148eba181b71575a88fa344fe09a840cf3.tar.bz2 |
dt-bindings: i2c: exynos5: Convert to dtschema
Convert Samsung Exynos High Speed I2C bindings doc to DT schema format.
Changes during bindings conversion:
1. Added missing required clock properties (driver fails when it's
unable to get the clock)
2. Removed properties and descriptions that can be found in
schemas/i2c/i2c-controller.yaml [1]
3. Fixed the example so it can be validated by dtschema
[1] https://github.com/robherring/dt-schema/blob/master/schemas/i2c/i2c-controller.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c/i2c-exynos5.txt')
-rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-exynos5.txt | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt b/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt deleted file mode 100644 index 2dbc0b62daa6..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-exynos5.txt +++ /dev/null @@ -1,53 +0,0 @@ -* Samsung's High Speed I2C controller - -The Samsung's High Speed I2C controller is used to interface with I2C devices -at various speeds ranging from 100khz to 3.4Mhz. - -Required properties: - - compatible: value should be. - -> "samsung,exynos5-hsi2c", (DEPRECATED) - for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available - on Exynos5250 and Exynos5420 SoCs. - -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available - on Exynos5260 SoCs. - -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available - on Exynos7 SoCs. - - - reg: physical base address of the controller and length of memory mapped - region. - - interrupts: interrupt number to the cpu. - - #address-cells: always 1 (for i2c addresses) - - #size-cells: always 0 - - - Pinctrl: - - pinctrl-0: Pin control group to be used for this controller. - - pinctrl-names: Should contain only one value - "default". - -Optional properties: - - clock-frequency: Desired operating frequency in Hz of the bus. - -> If not specified, the bus operates in fast-speed mode at - at 100khz. - -> If specified, the bus operates in high-speed mode only if the - clock-frequency is >= 1Mhz. - -Example: - -hsi2c@12ca0000 { - compatible = "samsung,exynos5250-hsi2c"; - reg = <0x12ca0000 0x100>; - interrupts = <56>; - clock-frequency = <100000>; - - pinctrl-0 = <&i2c4_bus>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <0>; - - s2mps11_pmic@66 { - compatible = "samsung,s2mps11-pmic"; - reg = <0x66>; - }; -}; |