diff options
| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2019-10-29 09:05:55 +1300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-10-29 16:17:10 +0100 |
| commit | 1dfc462a54386d8467ff427ef900f553e2e470e3 (patch) | |
| tree | 235c944e30bb3a283e6f2d5a8d27bfb47d95dd90 /Documentation/devicetree/bindings/gpio | |
| parent | 921d6c32b6f86c48e06667ce2f8c50ca45bfa212 (diff) | |
| download | linux-1dfc462a54386d8467ff427ef900f553e2e470e3.tar.bz2 | |
dt-bindings: gpio: brcm: Add bindings for xgs-iproc
This GPIO controller is present on a number of Broadcom switch ASICs
with integrated SoCs. It is similar to the nsp-gpio and iproc-gpio
blocks but different enough to require a separate driver.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191028200555.27524-1-chris.packham@alliedtelesis.co.nz
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
| -rw-r--r-- | Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml new file mode 100644 index 000000000000..64e279a4bc10 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom XGS iProc GPIO controller + +maintainers: + - Chris Packham <chris.packham@alliedtelesis.co.nz> + +description: | + This controller is the Chip Common A GPIO present on a number of Broadcom + switch ASICs with integrated SoCs. + +properties: + compatible: + const: brcm,iproc-gpio-cca + + reg: + items: + - description: the I/O address containing the GPIO controller + registers. + - description: the I/O address containing the Chip Common A interrupt + registers. + + gpio-controller: true + + '#gpio-cells': + const: 2 + + ngpios: + minimum: 0 + maximum: 32 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +dependencies: + interrupt-controller: [ interrupts ] + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + gpio@18000060 { + compatible = "brcm,iproc-gpio-cca"; + #gpio-cells = <2>; + reg = <0x18000060 0x50>, + <0x18000000 0x50>; + ngpios = <12>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + }; + + +... |