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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-15 16:47:58 +0100 |
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committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 15:59:00 +0100 |
commit | f7d12ef53ddfd8175933af42bfc477376d19e19e (patch) | |
tree | b4fa58b8dfd5003e9fd182fc1e01b66654f18bf3 /Documentation/devicetree/bindings/dma/mv-xor.txt | |
parent | 88eb92cb4d0a1520c2f9a653fba0f838871af3ab (diff) | |
download | linux-f7d12ef53ddfd8175933af42bfc477376d19e19e.tar.bz2 |
dma: mv_xor: add Device Tree binding
This patch finally adds a Device Tree binding to the mv_xor
driver. Thanks to the previous cleanup patches, the Device Tree
binding is relatively simply: one DT node per XOR engine, with
sub-nodes for each XOR channel of the XOR engine. The binding
obviously comes with the necessary documentation.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: devicetree-discuss@lists.ozlabs.org
Diffstat (limited to 'Documentation/devicetree/bindings/dma/mv-xor.txt')
-rw-r--r-- | Documentation/devicetree/bindings/dma/mv-xor.txt | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt new file mode 100644 index 000000000000..7c6cb7fcecd2 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mv-xor.txt @@ -0,0 +1,40 @@ +* Marvell XOR engines + +Required properties: +- compatible: Should be "marvell,orion-xor" +- reg: Should contain registers location and length (two sets) + the first set is the low registers, the second set the high + registers for the XOR engine. +- clocks: pointer to the reference clock + +The DT node must also contains sub-nodes for each XOR channel that the +XOR engine has. Those sub-nodes have the following required +properties: +- interrupts: interrupt of the XOR channel + +And the following optional properties: +- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations +- dmacap,memset to indicate that the XOR channel is capable of memset operations +- dmacap,xor to indicate that the XOR channel is capable of xor operations + +Example: + +xor@d0060900 { + compatible = "marvell,orion-xor"; + reg = <0xd0060900 0x100 + 0xd0060b00 0x100>; + clocks = <&coreclk 0>; + status = "okay"; + + xor00 { + interrupts = <51>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <52>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; +}; |