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authorTony Lindgren <tony@atomide.com>2022-02-03 09:39:29 +0200
committerRob Herring <robh@kernel.org>2022-02-09 16:01:00 -0600
commit31fc1c63c2ae4a542e3c7ac572a10a59ece45c24 (patch)
treee8883122a82b30b232694de4268475ae3d9b81d3 /Documentation/devicetree/bindings/clock
parent208b65f7b5cccb7185ec7c1b11e788eddf9e075a (diff)
downloadlinux-31fc1c63c2ae4a542e3c7ac572a10a59ece45c24.tar.bz2
dt-bindings: clock: Add binding for TI clksel
In order to prepare for fixing lots of devicetree unique_unit_address warnings for the TI clock nodes, let's add a binding for the TI clksel clocks. This allows us to move the overlapping reg properties for the component clocks to be children of the related clksel nodes. And with that we need the reg property only for the parent clksel node making the reg property unique like it should be. We want to set #clock-cells = <2> in case we ever start parsing ranges of clkcsel instances directly using a clksel driver rather than using the existing component clock drivers and child nodes. And before the devicetree files can be updated, we need to update the TI clock drivers to get the IO address from the parent clksel node. Cc: Tero Kristo <kristo@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220203073929.59296-1-tony@atomide.com
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml51
1 files changed, 51 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml b/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml
new file mode 100644
index 000000000000..c56f911fff47
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ti/ti,clksel.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Binding for TI clksel clock
+
+maintainers:
+ - Tony Lindgren <tony@atomide.com>
+
+description: |
+ The TI CLKSEL clocks consist of consist of input clock mux bits, and in some
+ cases also has divider, multiplier and gate bits.
+
+properties:
+ compatible:
+ const: ti,clksel
+
+ reg:
+ maxItems: 1
+ description: The CLKSEL register range
+
+ '#address-cells':
+ enum: [ 0, 1, 2 ]
+
+ '#size-cells':
+ enum: [ 0, 1, 2 ]
+
+ ranges: true
+
+ "#clock-cells":
+ const: 2
+ description: The CLKSEL register and bit offset
+
+required:
+ - compatible
+ - reg
+ - "#clock-cells"
+
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ clksel_gfx_fclk: clock@52c {
+ compatible = "ti,clksel";
+ reg = <0x25c 0x4>;
+ #clock-cells = <2>;
+ };
+...