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author | Govind Singh <govinds@codeaurora.org> | 2019-10-11 18:59:27 +0530 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2019-10-17 14:50:40 -0700 |
commit | 8e7b71f8a9750be1ca15f0285142a6aa000755a0 (patch) | |
tree | 102832b1f6e1977a71cea43ece7d263dbc62b1fa /Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml | |
parent | 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff) | |
download | linux-8e7b71f8a9750be1ca15f0285142a6aa000755a0.tar.bz2 |
dt-bindings: clock: qcom: Add QCOM Q6SSTOP clock controller bindings
Add devicetree binding for the Q6SSTOP clock controller found in QCS404.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Link: https://lkml.kernel.org/r/20191011132928.9388-2-govinds@codeaurora.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml new file mode 100644 index 000000000000..bbaaf1e2a203 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,q6sstopcc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Q6SSTOP clock Controller + +maintainers: + - Govind Singh <govinds@codeaurora.org> + +properties: + compatible: + const: "qcom,qcs404-q6sstopcc" + + reg: + items: + - description: Q6SSTOP clocks register region + - description: Q6SSTOP_TCSR register region + + clocks: + items: + - description: ahb clock for the q6sstopCC + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + q6sstopcc: clock-controller@7500000 { + compatible = "qcom,qcs404-q6sstopcc"; + reg = <0x07500000 0x4e000>, <0x07550000 0x10000>; + clocks = <&gcc 141>; + #clock-cells = <1>; + }; |