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author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-02-03 09:13:56 +0900 |
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committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-05 19:31:08 +0100 |
commit | a5958a939bbf93e6b77cb3626c6aebde237ad759 (patch) | |
tree | 006941dc9a66f2a8141c4dc60908b9ec5f56d125 /Documentation/devicetree/bindings/clock/exynos5433-clock.txt | |
parent | 6958f22f39f9292f6e871b4383a11f183c1271ed (diff) | |
download | linux-a5958a939bbf93e6b77cb3626c6aebde237ad759.tar.bz2 |
clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain
This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which
generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/exynos5433-clock.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5433-clock.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt index 84002e4b52e5..63379b04e052 100644 --- a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -48,6 +48,8 @@ Required Properties: - "samsung,exynos5433-cmu-cam0" - clock controller compatible for CMU_CAM0 which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs. + - "samsung,exynos5433-cmu-cam1" - clock controller compatible for CMU_CAM1 + which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs. - reg: physical base address of the controller and length of memory mapped region. @@ -153,6 +155,15 @@ Required Properties: - aclk_cam0_400 - aclk_cam0_552 + Input clocks for cam1 clock controller: + - oscclk + - sclk_isp_uart_cam1 + - sclk_isp_spi1_cam1 + - sclk_isp_spi0_cam1 + - aclk_cam1_333 + - aclk_cam1_400 + - aclk_cam1_552 + Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. @@ -414,6 +425,27 @@ Example 2: Examples of clock controller nodes are listed below. <&cmu_top CLK_ACLK_CAM0_552>; }; + cmu_cam1: clock-controller@145d0000 { + compatible = "samsung,exynos5433-cmu-cam1"; + reg = <0x145d0000 0x0b08>; + #clock-cells = <1>; + + clock-names = "oscclk", + "sclk_isp_uart_cam1", + "sclk_isp_spi1_cam1", + "sclk_isp_spi0_cam1", + "aclk_cam1_333", + "aclk_cam1_400", + "aclk_cam1_552"; + clocks = <&xxti>, + <&cmu_top CLK_SCLK_ISP_UART_CAM1>, + <&cmu_top CLK_SCLK_ISP_SPI1_CAM1>, + <&cmu_top CLK_SCLK_ISP_SPI0_CAM1>, + <&cmu_top CLK_ACLK_CAM1_333>, + <&cmu_top CLK_ACLK_CAM1_400>, + <&cmu_top CLK_ACLK_CAM1_552>; + }; + Example 3: UART controller node that consumes the clock generated by the clock controller. |