diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-09-15 18:15:53 +0200 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-22 11:38:59 +0200 |
commit | bcc5fd49a0fda5abc22057f65b318788ccb5d2ad (patch) | |
tree | edf97c273ea66306e5a6fdd81e6c5a78d31e8873 /Documentation/devicetree/bindings/clock/at91-clock.txt | |
parent | 5db722eeba0051c68e638114f6720e715b03cd2c (diff) | |
download | linux-bcc5fd49a0fda5abc22057f65b318788ccb5d2ad.tar.bz2 |
clk: at91: add a driver for the h32mx clock
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix
interconnect (h32mx) has a clock that can be setup at the half of the h64mx
clock (which is mck). The h32mx clock can not exceed 90 MHz.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/at91-clock.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/at91-clock.txt | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt index b3d544ca522a..7a4d4926f44e 100644 --- a/Documentation/devicetree/bindings/clock/at91-clock.txt +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt @@ -74,6 +74,9 @@ Required properties: "atmel,at91sam9x5-clk-utmi": at91 utmi clock + "atmel,sama5d4-clk-h32mx": + at91 h32mx clock + Required properties for SCKC node: - reg : defines the IO memory reserved for the SCKC. - #size-cells : shall be 0 (reg is used to encode clk id). @@ -447,3 +450,14 @@ For example: #clock-cells = <0>; clocks = <&main>; }; + +Required properties for 32 bits bus Matrix clock (h32mx clock): +- #clock-cells : from common clock binding; shall be set to 0. +- clocks : shall be the master clock source phandle. + +For example: + h32ck: h32mxck { + #clock-cells = <0>; + compatible = "atmel,sama5d4-clk-h32mx"; + clocks = <&mck>; + }; |