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| author | Brian Norris <briannorris@chromium.org> | 2016-10-04 11:12:09 -0700 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2016-11-21 11:05:36 +0100 |
| commit | d8ec7595a013237f82d965dcf981571aeb41855b (patch) | |
| tree | 098c25d78acbd3aa0f22a06c131fef47b674b692 /Documentation/devicetree/bindings/arm/arch_timer.txt | |
| parent | baa73d9e478ff32d62f3f9422822b59dd9a95a21 (diff) | |
| download | linux-d8ec7595a013237f82d965dcf981571aeb41855b.tar.bz2 | |
clocksource/drivers/arm_arch_timer: Don't assume clock runs in suspend
The ARM specifies that the system counter "must be implemented in an
always-on power domain," and so we try to use the counter as a source of
timekeeping across suspend/resume. Unfortunately, some SoCs (e.g.,
Rockchip's RK3399) do not keep the counter ticking properly when
switched from their high-power clock to the lower-power clock used in
system suspend. Support this quirk by adding a new device tree property.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/arch_timer.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/arch_timer.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index ef5fbe9a77c7..ad440a2b8051 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt @@ -38,6 +38,11 @@ to deliver its interrupts via SPIs. architecturally-defined reset values. Only supported for 32-bit systems which follow the ARMv7 architected reset values. +- arm,no-tick-in-suspend : The main counter does not tick when the system is in + low-power system suspend on some SoCs. This behavior does not match the + Architecture Reference Manual's specification that the system counter "must + be implemented in an always-on power domain." + Example: |