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authorMurali Karicheri <m-karicheri2@ti.com>2015-10-13 13:49:04 -0700
committerSantosh Shilimkar <ssantosh@kernel.org>2015-10-13 13:49:04 -0700
commit29204a8272aae490a1dd252e48e55ca235c3959c (patch)
tree3bbf51dbf671442d399c1bbe3c7cdaa57be474aa /Documentation/arm
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff)
downloadlinux-29204a8272aae490a1dd252e48e55ca235c3959c.tar.bz2
Documentation: dt: soc: Add description for knav qmss driver
Add documentation for knav qmss driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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+* Texas Instruments Keystone Navigator Queue Management SubSystem driver
+
+Driver source code path
+ drivers/soc/ti/knav_qmss.c
+ drivers/soc/ti/knav_qmss_acc.c
+
+The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
+the main hardware sub system which forms the backbone of the Keystone
+multi-core Navigator. QMSS consist of queue managers, packed-data structure
+processors(PDSP), linking RAM, descriptor pools and infrastructure
+Packet DMA.
+The Queue Manager is a hardware module that is responsible for accelerating
+management of the packet queues. Packets are queued/de-queued by writing or
+reading descriptor address to a particular memory mapped location. The PDSPs
+perform QMSS related functions like accumulation, QoS, or event management.
+Linking RAM registers are used to link the descriptors which are stored in
+descriptor RAM. Descriptor RAM is configurable as internal or external memory.
+The QMSS driver manages the PDSP setups, linking RAM regions,
+queue pool management (allocation, push, pop and notify) and descriptor
+pool management.
+
+knav qmss driver provides a set of APIs to drivers to open/close qmss queues,
+allocate descriptor pools, map the descriptors, push/pop to queues etc. For
+details of the available APIs, please refers to include/linux/soc/ti/knav_qmss.h