summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHeiko Stuebner <heiko@sntech.de>2016-01-20 21:47:57 +0100
committerHeiko Stuebner <heiko@sntech.de>2016-01-24 23:29:16 +0100
commitfd0c0740fac17a014704ef89d8c8b1768711ca59 (patch)
tree6101109b788438819235b3953325c3c9a5136924
parent0f28d98463498c61c61a38aacbf9f69e92e85e9d (diff)
downloadlinux-fd0c0740fac17a014704ef89d8c8b1768711ca59.tar.bz2
clk: rockchip: rk3368: fix hdmi_cec gate-register
Fix a typo making the sclk_hdmi_cec access a wrong register to handle its gate. Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: zhangqing <zhangqing@rock-chips.com> Cc: stable@vger.kernel.org
-rw-r--r--drivers/clk/rockchip/clk-rk3368.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index 990e1dc7529d..7016ed24bbe5 100644
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -442,7 +442,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0,
RK3368_CLKGATE_CON(4), 13, GFLAGS),
GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
- RK3368_CLKGATE_CON(5), 12, GFLAGS),
+ RK3368_CLKGATE_CON(4), 12, GFLAGS),
COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
RK3368_CLKSEL_CON(21), 15, 1, MFLAGS,