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authorMarkos Chandras <markos.chandras@imgtec.com>2015-07-16 15:30:04 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-07-19 11:31:24 +0200
commitfcc53b5f6c38acbf5d311ffc3e0da517491c6f7b (patch)
tree9369c7e815047cfed1e779ad110ad523d1ca62cc
parentdd0bc75ee3ec4ef694c2d0483b6ffeed17141435 (diff)
downloadlinux-fcc53b5f6c38acbf5d311ffc3e0da517491c6f7b.tar.bz2
MIPS: fpu.h: Allow 64-bit FPU on a 64-bit MIPS R6 CPU
Commit 6134d94923d0 ("MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6") added support for 64-bit FPU on a 32-bit MIPS R6 processor but it missed the 64-bit CPU case leading to FPU failures when requesting FR=1 mode (which is always the case for MIPS R6 userland) when running a 32-bit kernel on a 64-bit CPU. We also fix the MIPS R2 case. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Fixes: 6134d94923d0 ("MIPS: asm: fpu: Allow 64-bit FPU on MIPS32 R6") Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: <stable@vger.kernel.org> # 4.0+ Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10734/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/fpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 084780b355aa..1b0625189835 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -74,7 +74,7 @@ static inline int __enable_fpu(enum fpu_mode mode)
goto fr_common;
case FPU_64BIT:
-#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS32_R6) \
+#if !(defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) \
|| defined(CONFIG_64BIT))
/* we only have a 32-bit FPU */
return SIGFPE;