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| author | Jiang Jian <jiangjian@cdjrlc.com> | 2022-06-22 22:22:37 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-23 17:21:49 -0400 |
| commit | fa3dab48defe1ae2f5a5fb56df5f5931fb3e45c8 (patch) | |
| tree | e0fec0dad0bfb611dc2ae423ee4d2762fd29a5c8 | |
| parent | 3d313f09f31490cec9d5251b59adeb6542c944cc (diff) | |
| download | linux-fa3dab48defe1ae2f5a5fb56df5f5931fb3e45c8.tar.bz2 | |
gpu/drm/radeon: Fix typo in comments
Remove the repeated word 'and' from comments
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/r300_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h index 60d5413bafa1..9d341cff63ee 100644 --- a/drivers/gpu/drm/radeon/r300_reg.h +++ b/drivers/gpu/drm/radeon/r300_reg.h @@ -1103,7 +1103,7 @@ * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * |