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| author | Niklas Schnelle <schnelle@linux.ibm.com> | 2021-09-08 10:18:49 +0200 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-09-08 08:31:10 -0300 |
| commit | f4c6f31011eafe027abddf6cee1288a1b5a05b73 (patch) | |
| tree | 248ad1f8ea2d14579e056416a6783be5eb2fd9fd | |
| parent | 9660dcbe0d9186976917c94bce4e69dbd8d7a974 (diff) | |
| download | linux-f4c6f31011eafe027abddf6cee1288a1b5a05b73.tar.bz2 | |
RDMA/mlx5: Fix xlt_chunk_align calculation
The XLT chunk alignment depends on ent_size not sizeof(ent_size) aka
sizeof(size_t). The incoming ent_size is either 8 or 16, so the
miscalculation when 16 is required is only an over-alignment and
functional harmless.
Fixes: 8010d74b9965 ("RDMA/mlx5: Split the WR setup out of mlx5_ib_update_xlt()")
Link: https://lore.kernel.org/r/20210908081849.7948-2-schnelle@linux.ibm.com
Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
| -rw-r--r-- | drivers/infiniband/hw/mlx5/mr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c index b2dd1173c98a..3be36ebbf67a 100644 --- a/drivers/infiniband/hw/mlx5/mr.c +++ b/drivers/infiniband/hw/mlx5/mr.c @@ -995,7 +995,7 @@ static struct mlx5_ib_mr *alloc_cacheable_mr(struct ib_pd *pd, static void *mlx5_ib_alloc_xlt(size_t *nents, size_t ent_size, gfp_t gfp_mask) { const size_t xlt_chunk_align = - MLX5_UMR_MTT_ALIGNMENT / sizeof(ent_size); + MLX5_UMR_MTT_ALIGNMENT / ent_size; size_t size; void *res = NULL; |