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author | Thierry Reding <treding@nvidia.com> | 2021-12-07 16:07:46 +0100 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2022-02-25 14:40:39 +0100 |
commit | f0a481209d6fa70854673173bf5f8a1cb24bd7f2 (patch) | |
tree | 5a4201997f8dd8e8957a1ae05b40e79a924e62a8 | |
parent | c6489c30fcbcfda963c79f003adcdf7a69e33b8a (diff) | |
download | linux-f0a481209d6fa70854673173bf5f8a1cb24bd7f2.tar.bz2 |
arm64: tegra: Drop arm,armv8-pmuv3 compatible string
The arm,armv8-pmuv3 compatible string is meant to be used only for
software models and not silicon chips. Drop them and use silicon-
specific compatible strings instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 | ||||
-rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 899d7b1cb780..e9b40f5d79ec 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1980,14 +1980,14 @@ }; pmu_denver { - compatible = "nvidia,denver-pmu", "arm,armv8-pmuv3"; + compatible = "nvidia,denver-pmu"; interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&denver_0 &denver_1>; }; pmu_a57 { - compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; + compatible = "arm,cortex-a57-pmu"; interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index db26a5741e48..c28bf4d8eb03 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -2886,7 +2886,7 @@ }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "nvidia,carmel-pmu"; interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, |