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author | Marek Vasut <marex@denx.de> | 2022-03-25 18:58:51 +0100 |
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committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2022-04-19 17:21:12 +0200 |
commit | ef2d90708883f4025a801feb0ba8411a7a4387e1 (patch) | |
tree | 60424389f0d3152b8d9d967bee9b0cba92f79cf9 | |
parent | 42da167bbd2910e4ac6334174f6dc273e079fb91 (diff) | |
download | linux-ef2d90708883f4025a801feb0ba8411a7a4387e1.tar.bz2 |
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
Per KSZ9031RNX PHY datasheet FIGURE 7-5: POWER-UP/POWER-DOWN/RESET TIMING
Note 2: After the de-assertion of reset, wait a minimum of 100 μs before
starting programming on the MIIM (MDC/MDIO) interface.
Add 1ms post-reset delay to guarantee this figure.
Fixes: 010ca9fe500bf ("ARM: dts: stm32: Add missing ethernet PHY reset on AV96")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
-rw-r--r-- | arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi index 61e17f44ce81..76c54b006d87 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi @@ -141,6 +141,7 @@ compatible = "snps,dwmac-mdio"; reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>; reset-delay-us = <1000>; + reset-post-delay-us = <1000>; phy0: ethernet-phy@7 { reg = <7>; |