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author | Leilk Liu <leilk.liu@mediatek.com> | 2015-10-26 16:09:41 +0800 |
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committer | Mark Brown <broonie@kernel.org> | 2015-10-27 13:33:35 +0900 |
commit | eca3a1ee8dd7ec5819bd77d598044eb6ecdf4495 (patch) | |
tree | 0f26cdc16a26d5269bd662170763027e9eb354b2 | |
parent | 32b88194f71d6ae7768a29f87fbba454728273ee (diff) | |
download | linux-eca3a1ee8dd7ec5819bd77d598044eb6ecdf4495.tar.bz2 |
spi: mediatek: Update document devicetree bindings to support multiple devices
This patch updates document devicetree bindings
to support multiple devices.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/spi/spi-mt65xx.txt | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt index 6160ffbcb3d3..ce363c923f44 100644 --- a/Documentation/devicetree/bindings/spi/spi-mt65xx.txt +++ b/Documentation/devicetree/bindings/spi/spi-mt65xx.txt @@ -29,8 +29,11 @@ Required properties: muxes clock, and "spi-clk" for the clock gate. Optional properties: +-cs-gpios: see spi-bus.txt, only required for MT8173. + - mediatek,pad-select: specify which pins group(ck/mi/mo/cs) spi - controller used, this value should be 0~3, only required for MT8173. + controller used. This is a array, the element value should be 0~3, + only required for MT8173. 0: specify GPIO69,70,71,72 for spi pins. 1: specify GPIO102,103,104,105 for spi pins. 2: specify GPIO128,129,130,131 for spi pins. @@ -49,7 +52,7 @@ spi: spi@1100a000 { <&topckgen CLK_TOP_SPI_SEL>, <&pericfg CLK_PERI_SPI0>; clock-names = "parent-clk", "sel-clk", "spi-clk"; - - mediatek,pad-select = <0>; + cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>; + mediatek,pad-select = <1>, <0>; status = "disabled"; }; |