diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2022-02-24 11:17:11 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-02-25 13:51:07 +0000 |
| commit | eaba113430d6c5e2c74fc8061fbd86efc000e99c (patch) | |
| tree | 2dd2b5287e35d5b6155837131c67dcbc1909e4e0 | |
| parent | 31bd0db84c6010cd6cf38048570b51aaae26d91d (diff) | |
| download | linux-eaba113430d6c5e2c74fc8061fbd86efc000e99c.tar.bz2 | |
ASoC: codecs: rx-macro: setup soundwire clks correctly
For SoundWire Frame sync to be generated correctly we need both MCLK
and MCLKx2 (npl). Without pm runtime enabled these two clocks will remain on,
however after adding pm runtime support its possible that NPl clock could be
turned off even when SoundWire controller is active.
Fix this by enabling mclk and npl clk when SoundWire clks are enabled.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220224111718.6264-10-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/codecs/lpass-rx-macro.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/sound/soc/codecs/lpass-rx-macro.c b/sound/soc/codecs/lpass-rx-macro.c index c627b0afdf7e..65fc3698492f 100644 --- a/sound/soc/codecs/lpass-rx-macro.c +++ b/sound/soc/codecs/lpass-rx-macro.c @@ -3426,6 +3426,13 @@ static int rx_macro_component_probe(struct snd_soc_component *component) static int swclk_gate_enable(struct clk_hw *hw) { struct rx_macro *rx = to_rx_macro(hw); + int ret; + + ret = clk_prepare_enable(rx->mclk); + if (ret) { + dev_err(rx->dev, "unable to prepare mclk\n"); + return ret; + } rx_macro_mclk_enable(rx, true); if (rx->reset_swr) @@ -3452,6 +3459,7 @@ static void swclk_gate_disable(struct clk_hw *hw) CDC_RX_SWR_CLK_EN_MASK, 0); rx_macro_mclk_enable(rx, false); + clk_disable_unprepare(rx->mclk); } static int swclk_gate_is_enabled(struct clk_hw *hw) @@ -3488,7 +3496,7 @@ static int rx_macro_register_mclk_output(struct rx_macro *rx) struct clk_init_data init; int ret; - parent_clk_name = __clk_get_name(rx->mclk); + parent_clk_name = __clk_get_name(rx->npl); init.name = clk_name; init.ops = &swclk_gate_ops; |