diff options
author | Andrew Victor <andrew@sanpeople.com> | 2007-01-09 12:47:51 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-01-24 11:59:55 +0000 |
commit | e9d10a16ea76f42ea9ce58508e4af7c52acf1e40 (patch) | |
tree | 164b5f92294d9be558c19696394452ed2ee5200c | |
parent | a14d527306dc7dbc38e4607c3cc3a50a600fc98b (diff) | |
download | linux-e9d10a16ea76f42ea9ce58508e4af7c52acf1e40.tar.bz2 |
[ARM] 4087/1: AT91: CPU reset for SAM9x processors
This patch implements CPU and peripheral reset on AT91SAM9260 and
AT91SAM9261.
Original patch from Wojtek Kaniewski.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-at91rm9200/at91sam9260.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/at91sam9261.c | 3 |
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c index 203f073a53e6..b14871adc300 100644 --- a/arch/arm/mach-at91rm9200/at91sam9260.c +++ b/arch/arm/mach-at91rm9200/at91sam9260.c @@ -16,6 +16,7 @@ #include <asm/mach/map.h> #include <asm/arch/at91sam9260.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> #include "generic.h" #include "clock.h" @@ -212,7 +213,7 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { static void at91sam9260_reset(void) { -#warning "Implement CPU reset" + at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); } diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c index 5a82f35da2e9..d242bb885c6d 100644 --- a/arch/arm/mach-at91rm9200/at91sam9261.c +++ b/arch/arm/mach-at91rm9200/at91sam9261.c @@ -16,6 +16,7 @@ #include <asm/mach/map.h> #include <asm/arch/at91sam9261.h> #include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> #include "generic.h" #include "clock.h" @@ -207,7 +208,7 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { static void at91sam9261_reset(void) { -#warning "Implement CPU reset" + at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); } |