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| author | Greg Ungerer <gerg@snapgear.com> | 2006-06-26 10:33:10 +1000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-25 17:43:33 -0700 |
| commit | df8fbe1e7f250b157c5815a005a9650548315d1f (patch) | |
| tree | d6c10c9fd138c6583fb5688ecbad79d4751f0a57 | |
| parent | 76aa698f331475147825ae135eae98bfd457825b (diff) | |
| download | linux-df8fbe1e7f250b157c5815a005a9650548315d1f.tar.bz2 | |
[PATCH] m68knommu: add ColdFire 532x cache init
Add cache init support for the new ColdFire 532x CPU family.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| -rw-r--r-- | include/asm-m68knommu/mcfcache.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h index 45d1ac57ea82..7b61a8a529f5 100644 --- a/include/asm-m68knommu/mcfcache.h +++ b/include/asm-m68knommu/mcfcache.h @@ -92,6 +92,21 @@ .endm #endif /* CONFIG_M5249 || CONFIG_M5307 */ +#if defined(CONFIG_M532x) +.macro CACHE_ENABLE + movel #0x01000000,%d0 /* invalidate cache cmd */ + movec %d0,%CACR /* do invalidate cache */ + nop + movel #0x4001C000,%d0 /* set SDRAM cached (write-thru) */ + movec %d0,%ACR0 + movel #0x00000000,%d0 /* no other regions cached */ + movec %d0,%ACR1 + movel #0x80000200,%d0 /* setup cache mask */ + movec %d0,%CACR /* enable cache */ + nop +.endm +#endif /* CONFIG_M532x */ + #if defined(CONFIG_M5407) /* * Version 4 cores have a true harvard style separate instruction |