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author | Ralf Baechle <ralf@linux-mips.org> | 2006-01-19 14:55:42 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-02-07 13:30:22 +0000 |
commit | dd2f18fe5af54ea8928f175d3bff9401a0fb6b83 (patch) | |
tree | 34545005e0066fc7e092f32bb2f4ba49ed7ae672 | |
parent | c011db451bcce468a6f999949fbdbc2fec1167d2 (diff) | |
download | linux-dd2f18fe5af54ea8928f175d3bff9401a0fb6b83.tar.bz2 |
[MIPS] Nevada support for SGI O2.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/Kconfig | 1 | ||||
-rw-r--r-- | arch/mips/configs/ip32_defconfig | 1 | ||||
-rw-r--r-- | include/asm-mips/mach-ip32/cpu-feature-overrides.h | 2 |
3 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c3e852e9953e..767de847b4ab 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -595,6 +595,7 @@ config SGI_IP32 select SYS_HAS_CPU_R5000 select SYS_HAS_CPU_R10000 if BROKEN select SYS_HAS_CPU_RM7000 + select SYS_HAS_CPU_NEVADA select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN help diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index 967e7acd8e1f..a34db6e82b27 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -102,6 +102,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_SYS_HAS_CPU_R5000=y +CONFIG_SYS_HAS_CPU_NEVADA=y CONFIG_SYS_HAS_CPU_RM7000=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index b80c30725cf6..36070b5654ab 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h @@ -18,7 +18,7 @@ * so, for 64bit IP32 kernel we just don't use ll/sc. * This does not affect luserland. */ -#if defined(CONFIG_CPU_R5000) && defined(CONFIG_64BIT) +#if (defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)) && defined(CONFIG_64BIT) #define cpu_has_llsc 0 #else #define cpu_has_llsc 1 |