diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2022-04-29 12:46:02 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-06 11:09:34 +0200 |
| commit | d8ff11cdc0b153bfebf103716cb1e3f6a26029ed (patch) | |
| tree | bb4c491845bd3292162ebc144f1ac60b704f90d5 | |
| parent | 6af663af3c46300032fd7a783bdc3e585035438f (diff) | |
| download | linux-d8ff11cdc0b153bfebf103716cb1e3f6a26029ed.tar.bz2 | |
ARM: dts: r9a06g032: Describe the RTC
Describe the SoC RTC which counts time and provides alarm support.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20220429104602.368055-7-miquel.raynal@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm/boot/dts/r9a06g032.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 50fc2e04877e..2d5756935d98 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -66,6 +66,19 @@ interrupt-parent = <&gic>; ranges; + rtc0: rtc@40006000 { + compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc"; + reg = <0x40006000 0x1000>; + interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "alarm", "timer", "pps"; + clocks = <&sysctrl R9A06G032_HCLK_RTC>; + clock-names = "hclk"; + power-domains = <&sysctrl>; + status = "disabled"; + }; + wdt0: watchdog@40008000 { compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt"; reg = <0x40008000 0x1000>; |