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| author | Colin Ian King <colin.king@canonical.com> | 2018-04-18 12:47:50 +0100 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2018-04-30 13:34:51 +0300 |
| commit | cc282a0c5f0823bfcf084103445c69894129227c (patch) | |
| tree | 85df8623f7a793077fa7aa463f5abb0f0f8ec38b | |
| parent | 48c6b5c9c1180b7f8b35edeaef9b3aa3e3b6c9d5 (diff) | |
| download | linux-cc282a0c5f0823bfcf084103445c69894129227c.tar.bz2 | |
rt2x00: fix spelling mistake in various macros, UKNOWN -> UNKNOWN
Rename several macros that contain mispellings of UNKNOWN
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
| -rw-r--r-- | drivers/net/wireless/ralink/rt2x00/rt2800.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800.h b/drivers/net/wireless/ralink/rt2x00/rt2800.h index 7a133e94b1bf..b05ed2f3025a 100644 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h @@ -1194,10 +1194,10 @@ #define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0) #define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00) #define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000) -#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000) -#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000) -#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000) -#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000) +#define TX_PWR_CFG_3_UNKNOWN1 FIELD32(0x000f0000) +#define TX_PWR_CFG_3_UNKNOWN2 FIELD32(0x00f00000) +#define TX_PWR_CFG_3_UNKNOWN3 FIELD32(0x0f000000) +#define TX_PWR_CFG_3_UNKNOWN4 FIELD32(0xf0000000) /* bits for 3T devices */ #define TX_PWR_CFG_3_MCS12_CH0 FIELD32(0x0000000f) #define TX_PWR_CFG_3_MCS12_CH1 FIELD32(0x000000f0) @@ -1217,10 +1217,10 @@ * TX_PWR_CFG_4: */ #define TX_PWR_CFG_4 0x1324 -#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f) -#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0) -#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00) -#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000) +#define TX_PWR_CFG_4_UNKNOWN5 FIELD32(0x0000000f) +#define TX_PWR_CFG_4_UNKNOWN6 FIELD32(0x000000f0) +#define TX_PWR_CFG_4_UNKNOWN7 FIELD32(0x00000f00) +#define TX_PWR_CFG_4_UNKNOWN8 FIELD32(0x0000f000) /* bits for 3T devices */ #define TX_PWR_CFG_4_STBC4_CH0 FIELD32(0x0000000f) #define TX_PWR_CFG_4_STBC4_CH1 FIELD32(0x000000f0) |