summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorEvan Quan <evan.quan@amd.com>2020-07-08 11:17:02 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-21 15:37:38 -0400
commitc1b353b7eac5e32551e2aa65fad2e952748f9b28 (patch)
treeec193602b1044c91515943998fb9f47709dedde2
parentcaad2613dc4bd7396f1f0d32f5f0e650f9d8ebc4 (diff)
downloadlinux-c1b353b7eac5e32551e2aa65fad2e952748f9b28.tar.bz2
drm/amd/powerplay: update the tables init related
To avoid cross calling and maintain clear code layer. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/powerplay/arcturus_ppt.c23
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h4
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h2
-rw-r--r--drivers/gpu/drm/amd/powerplay/navi10_ppt.c25
-rw-r--r--drivers/gpu/drm/amd/powerplay/renoir_ppt.c6
-rw-r--r--drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c25
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_internal.h2
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_v11_0.c86
-rw-r--r--drivers/gpu/drm/amd/powerplay/smu_v12_0.c30
9 files changed, 83 insertions, 120 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 4fc2b9347cfa..8141895d6831 100644
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -207,9 +207,10 @@ static const struct cmn2asic_mapping arcturus_workload_map[PP_SMC_POWER_PROFILE_
WORKLOAD_MAP(PP_SMC_POWER_PROFILE_CUSTOM, WORKLOAD_PPLIB_CUSTOM_BIT),
};
-static int arcturus_tables_init(struct smu_context *smu, struct smu_table *tables)
+static int arcturus_tables_init(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = smu_table->tables;
SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -258,6 +259,21 @@ static int arcturus_allocate_dpm_context(struct smu_context *smu)
return 0;
}
+static int arcturus_init_smc_tables(struct smu_context *smu)
+{
+ int ret = 0;
+
+ ret = arcturus_tables_init(smu);
+ if (ret)
+ return ret;
+
+ ret = arcturus_allocate_dpm_context(smu);
+ if (ret)
+ return ret;
+
+ return smu_v11_0_init_smc_tables(smu);
+}
+
static int
arcturus_get_allowed_feature_mask(struct smu_context *smu,
uint32_t *feature_mask, uint32_t num)
@@ -2237,9 +2253,6 @@ static void arcturus_log_thermal_throttling_event(struct smu_context *smu)
}
static const struct pptable_funcs arcturus_ppt_funcs = {
- /* internal structurs allocations */
- .tables_init = arcturus_tables_init,
- .alloc_dpm_context = arcturus_allocate_dpm_context,
/* init dpm */
.get_allowed_feature_mask = arcturus_get_allowed_feature_mask,
/* btc */
@@ -2267,7 +2280,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.init_microcode = smu_v11_0_init_microcode,
.load_microcode = smu_v11_0_load_microcode,
.fini_microcode = smu_v11_0_fini_microcode,
- .init_smc_tables = smu_v11_0_init_smc_tables,
+ .init_smc_tables = arcturus_init_smc_tables,
.fini_smc_tables = smu_v11_0_fini_smc_tables,
.init_power = smu_v11_0_init_power,
.fini_power = smu_v11_0_fini_power,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 112b998e8543..60bc3a7775e9 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -259,7 +259,7 @@ struct smu_table_context
void *max_sustainable_clocks;
struct smu_bios_boot_up_values boot_values;
void *driver_pptable;
- struct smu_table *tables;
+ struct smu_table tables[SMU_TABLE_COUNT];
/*
* The driver table is just a staging buffer for
* uploading/downloading content from the SMU.
@@ -451,7 +451,6 @@ struct smu_context
struct i2c_adapter;
struct pptable_funcs {
- int (*alloc_dpm_context)(struct smu_context *smu);
int (*run_btc)(struct smu_context *smu);
int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
@@ -490,7 +489,6 @@ struct pptable_funcs {
int (*notify_smc_display_config)(struct smu_context *smu);
int (*set_cpu_power_state)(struct smu_context *smu);
bool (*is_dpm_running)(struct smu_context *smu);
- int (*tables_init)(struct smu_context *smu, struct smu_table *tables);
int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed);
int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
int (*set_watermarks_table)(struct smu_context *smu,
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
index dd3904e8aef0..e3db0fe1f2c3 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h
@@ -58,8 +58,6 @@ uint32_t smu_v12_0_get_gfxoff_status(struct smu_context *smu);
int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable);
-int smu_v12_0_init_smc_tables(struct smu_context *smu);
-
int smu_v12_0_fini_smc_tables(struct smu_context *smu);
int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index f79441ecc2f2..9ac1470e7f25 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -448,9 +448,10 @@ static int navi10_setup_pptable(struct smu_context *smu)
return ret;
}
-static int navi10_tables_init(struct smu_context *smu, struct smu_table *tables)
+static int navi10_tables_init(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = smu_table->tables;
SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -579,9 +580,6 @@ static int navi10_allocate_dpm_context(struct smu_context *smu)
{
struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
- if (smu_dpm->dpm_context)
- return -EINVAL;
-
smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context),
GFP_KERNEL);
if (!smu_dpm->dpm_context)
@@ -592,6 +590,21 @@ static int navi10_allocate_dpm_context(struct smu_context *smu)
return 0;
}
+static int navi10_init_smc_tables(struct smu_context *smu)
+{
+ int ret = 0;
+
+ ret = navi10_tables_init(smu);
+ if (ret)
+ return ret;
+
+ ret = navi10_allocate_dpm_context(smu);
+ if (ret)
+ return ret;
+
+ return smu_v11_0_init_smc_tables(smu);
+}
+
static int navi10_set_default_dpm_table(struct smu_context *smu)
{
struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
@@ -2252,8 +2265,6 @@ static int navi10_disable_umc_cdr_12gbps_workaround(struct smu_context *smu)
}
static const struct pptable_funcs navi10_ppt_funcs = {
- .tables_init = navi10_tables_init,
- .alloc_dpm_context = navi10_allocate_dpm_context,
.get_allowed_feature_mask = navi10_get_allowed_feature_mask,
.set_default_dpm_table = navi10_set_default_dpm_table,
.dpm_set_vcn_enable = navi10_dpm_set_vcn_enable,
@@ -2281,7 +2292,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.init_microcode = smu_v11_0_init_microcode,
.load_microcode = smu_v11_0_load_microcode,
.fini_microcode = smu_v11_0_fini_microcode,
- .init_smc_tables = smu_v11_0_init_smc_tables,
+ .init_smc_tables = navi10_init_smc_tables,
.fini_smc_tables = smu_v11_0_fini_smc_tables,
.init_power = smu_v11_0_init_power,
.fini_power = smu_v11_0_fini_power,
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 5097ea005eef..1ed2a5e96aac 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -151,9 +151,10 @@ static int renoir_get_metrics_table(struct smu_context *smu,
return ret;
}
-static int renoir_tables_init(struct smu_context *smu, struct smu_table *tables)
+static int renoir_init_smc_tables(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = smu_table->tables;
SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -994,7 +995,6 @@ static bool renoir_is_dpm_running(struct smu_context *smu)
}
static const struct pptable_funcs renoir_ppt_funcs = {
- .tables_init = renoir_tables_init,
.set_power_state = NULL,
.print_clk_levels = renoir_print_clk_levels,
.get_current_power_state = renoir_get_current_power_state,
@@ -1014,7 +1014,7 @@ static const struct pptable_funcs renoir_ppt_funcs = {
.set_gfx_cgpg = smu_v12_0_set_gfx_cgpg,
.gfx_off_control = smu_v12_0_gfx_off_control,
.get_gfx_off_status = smu_v12_0_get_gfxoff_status,
- .init_smc_tables = smu_v12_0_init_smc_tables,
+ .init_smc_tables = renoir_init_smc_tables,
.fini_smc_tables = smu_v12_0_fini_smc_tables,
.set_default_dpm_table = smu_v12_0_set_default_dpm_tables,
.get_enabled_mask = smu_cmn_get_enabled_mask,
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 9b3de4bd2643..28cc90c939d2 100644
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -355,9 +355,10 @@ static int sienna_cichlid_setup_pptable(struct smu_context *smu)
return ret;
}
-static int sienna_cichlid_tables_init(struct smu_context *smu, struct smu_table *tables)
+static int sienna_cichlid_tables_init(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = smu_table->tables;
SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
@@ -493,9 +494,6 @@ static int sienna_cichlid_allocate_dpm_context(struct smu_context *smu)
{
struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
- if (smu_dpm->dpm_context)
- return -EINVAL;
-
smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context),
GFP_KERNEL);
if (!smu_dpm->dpm_context)
@@ -506,6 +504,21 @@ static int sienna_cichlid_allocate_dpm_context(struct smu_context *smu)
return 0;
}
+static int sienna_cichlid_init_smc_tables(struct smu_context *smu)
+{
+ int ret = 0;
+
+ ret = sienna_cichlid_tables_init(smu);
+ if (ret)
+ return ret;
+
+ ret = sienna_cichlid_allocate_dpm_context(smu);
+ if (ret)
+ return ret;
+
+ return smu_v11_0_init_smc_tables(smu);
+}
+
static int sienna_cichlid_set_default_dpm_table(struct smu_context *smu)
{
struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
@@ -2405,8 +2418,6 @@ static void sienna_cichlid_dump_pptable(struct smu_context *smu)
}
static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
- .tables_init = sienna_cichlid_tables_init,
- .alloc_dpm_context = sienna_cichlid_allocate_dpm_context,
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,
.dpm_set_vcn_enable = sienna_cichlid_dpm_set_vcn_enable,
@@ -2433,7 +2444,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.dump_pptable = sienna_cichlid_dump_pptable,
.init_microcode = smu_v11_0_init_microcode,
.load_microcode = smu_v11_0_load_microcode,
- .init_smc_tables = smu_v11_0_init_smc_tables,
+ .init_smc_tables = sienna_cichlid_init_smc_tables,
.fini_smc_tables = smu_v11_0_fini_smc_tables,
.init_power = smu_v11_0_init_power,
.fini_power = smu_v11_0_fini_power,
diff --git a/drivers/gpu/drm/amd/powerplay/smu_internal.h b/drivers/gpu/drm/amd/powerplay/smu_internal.h
index 78472726e606..55d280e48f16 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_internal.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_internal.h
@@ -51,7 +51,6 @@
#define smu_set_default_od_settings(smu) smu_ppt_funcs(set_default_od_settings, 0, smu)
#define smu_send_smc_msg_with_param(smu, msg, param, read_arg) smu_ppt_funcs(send_smc_msg_with_param, 0, smu, msg, param, read_arg)
#define smu_send_smc_msg(smu, msg, read_arg) smu_ppt_funcs(send_smc_msg_with_param, 0, smu, msg, 0, read_arg)
-#define smu_alloc_dpm_context(smu) smu_ppt_funcs(alloc_dpm_context, 0, smu)
#define smu_init_display_count(smu, count) smu_ppt_funcs(init_display_count, 0, smu, count)
#define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu)
#define smu_feature_get_enabled_mask(smu, mask, num) smu_ppt_funcs(get_enabled_mask, 0, smu, mask, num)
@@ -62,7 +61,6 @@
#define smu_set_default_dpm_table(smu) smu_ppt_funcs(set_default_dpm_table, 0, smu)
#define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu)
#define smu_set_default_od8_settings(smu) smu_ppt_funcs(set_default_od8_settings, 0, smu)
-#define smu_tables_init(smu, tab) smu_ppt_funcs(tables_init, 0, smu, tab)
#define smu_enable_thermal_alert(smu) smu_ppt_funcs(enable_thermal_alert, 0, smu)
#define smu_disable_thermal_alert(smu) smu_ppt_funcs(disable_thermal_alert, 0, smu)
#define smu_smc_read_sensor(smu, sensor, data, size) smu_ppt_funcs(read_sensor, -EINVAL, smu, sensor, data, size)
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 0c0303a05f16..1913f4ffc1e0 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -435,70 +435,24 @@ int smu_v11_0_setup_pptable(struct smu_context *smu)
return 0;
}
-static int smu_v11_0_init_dpm_context(struct smu_context *smu)
-{
- struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
-
- if (smu_dpm->dpm_context || smu_dpm->dpm_context_size != 0)
- return -EINVAL;
-
- return smu_alloc_dpm_context(smu);
-}
-
-static int smu_v11_0_fini_dpm_context(struct smu_context *smu)
-{
- struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
-
- if (!smu_dpm->dpm_context || smu_dpm->dpm_context_size == 0)
- return -EINVAL;
-
- kfree(smu_dpm->dpm_context);
- kfree(smu_dpm->golden_dpm_context);
- kfree(smu_dpm->dpm_current_power_state);
- kfree(smu_dpm->dpm_request_power_state);
- smu_dpm->dpm_context = NULL;
- smu_dpm->golden_dpm_context = NULL;
- smu_dpm->dpm_context_size = 0;
- smu_dpm->dpm_current_power_state = NULL;
- smu_dpm->dpm_request_power_state = NULL;
-
- return 0;
-}
-
int smu_v11_0_init_smc_tables(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
- struct smu_table *tables = NULL;
+ struct smu_table *tables = smu_table->tables;
int ret = 0;
- tables = kcalloc(SMU_TABLE_COUNT, sizeof(struct smu_table),
- GFP_KERNEL);
- if (!tables) {
- ret = -ENOMEM;
- goto err0_out;
- }
- smu_table->tables = tables;
-
- ret = smu_tables_init(smu, tables);
- if (ret)
- goto err1_out;
-
- ret = smu_v11_0_init_dpm_context(smu);
- if (ret)
- goto err1_out;
-
smu_table->driver_pptable =
kzalloc(tables[SMU_TABLE_PPTABLE].size, GFP_KERNEL);
if (!smu_table->driver_pptable) {
ret = -ENOMEM;
- goto err2_out;
+ goto err0_out;
}
smu_table->max_sustainable_clocks =
kzalloc(sizeof(struct smu_11_0_max_sustainable_clocks), GFP_KERNEL);
if (!smu_table->max_sustainable_clocks) {
ret = -ENOMEM;
- goto err3_out;
+ goto err1_out;
}
/* Arcturus does not support OVERDRIVE */
@@ -507,29 +461,25 @@ int smu_v11_0_init_smc_tables(struct smu_context *smu)
kzalloc(tables[SMU_TABLE_OVERDRIVE].size, GFP_KERNEL);
if (!smu_table->overdrive_table) {
ret = -ENOMEM;
- goto err4_out;
+ goto err2_out;
}
smu_table->boot_overdrive_table =
kzalloc(tables[SMU_TABLE_OVERDRIVE].size, GFP_KERNEL);
if (!smu_table->boot_overdrive_table) {
ret = -ENOMEM;
- goto err5_out;
+ goto err3_out;
}
}
return 0;
-err5_out:
- kfree(smu_table->overdrive_table);
-err4_out:
- kfree(smu_table->max_sustainable_clocks);
err3_out:
- kfree(smu_table->driver_pptable);
+ kfree(smu_table->overdrive_table);
err2_out:
- smu_v11_0_fini_dpm_context(smu);
+ kfree(smu_table->max_sustainable_clocks);
err1_out:
- kfree(tables);
+ kfree(smu_table->driver_pptable);
err0_out:
return ret;
}
@@ -537,10 +487,7 @@ err0_out:
int smu_v11_0_fini_smc_tables(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
- int ret = 0;
-
- if (!smu_table->tables)
- return -EINVAL;
+ struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
kfree(smu_table->boot_overdrive_table);
kfree(smu_table->overdrive_table);
@@ -553,17 +500,22 @@ int smu_v11_0_fini_smc_tables(struct smu_context *smu)
kfree(smu_table->hardcode_pptable);
smu_table->hardcode_pptable = NULL;
- kfree(smu_table->tables);
kfree(smu_table->metrics_table);
kfree(smu_table->watermarks_table);
- smu_table->tables = NULL;
smu_table->metrics_table = NULL;
smu_table->watermarks_table = NULL;
smu_table->metrics_time = 0;
- ret = smu_v11_0_fini_dpm_context(smu);
- if (ret)
- return ret;
+ kfree(smu_dpm->dpm_context);
+ kfree(smu_dpm->golden_dpm_context);
+ kfree(smu_dpm->dpm_current_power_state);
+ kfree(smu_dpm->dpm_request_power_state);
+ smu_dpm->dpm_context = NULL;
+ smu_dpm->golden_dpm_context = NULL;
+ smu_dpm->dpm_context_size = 0;
+ smu_dpm->dpm_current_power_state = NULL;
+ smu_dpm->dpm_request_power_state = NULL;
+
return 0;
}
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
index 364358ad7566..60dc35933376 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
@@ -255,36 +255,18 @@ int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable)
return ret;
}
-int smu_v12_0_init_smc_tables(struct smu_context *smu)
-{
- struct smu_table_context *smu_table = &smu->smu_table;
- struct smu_table *tables = NULL;
-
- if (smu_table->tables)
- return -EINVAL;
-
- tables = kcalloc(SMU_TABLE_COUNT, sizeof(struct smu_table),
- GFP_KERNEL);
- if (!tables)
- return -ENOMEM;
-
- smu_table->tables = tables;
-
- return smu_tables_init(smu, tables);
-}
-
int smu_v12_0_fini_smc_tables(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
- if (!smu_table->tables)
- return -EINVAL;
-
kfree(smu_table->clocks_table);
- kfree(smu_table->tables);
-
smu_table->clocks_table = NULL;
- smu_table->tables = NULL;
+
+ kfree(smu_table->metrics_table);
+ smu_table->metrics_table = NULL;
+
+ kfree(smu_table->watermarks_table);
+ smu_table->watermarks_table = NULL;
return 0;
}