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| author | Evan Quan <evan.quan@amd.com> | 2020-07-10 10:46:48 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-15 12:42:14 -0400 |
| commit | c1a9e61c582e42ef4820f77b43a11cbb6e673b2c (patch) | |
| tree | 87abe8015aef308c063323820883224649bbdf12 | |
| parent | 4387b10434fe9acde582b886d16a72ec1843c0e9 (diff) | |
| download | linux-c1a9e61c582e42ef4820f77b43a11cbb6e673b2c.tar.bz2 | |
drm/amd/powerplay: implement a common set dpm table API for smu V11
Maximum the code sharing around smu V11.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 38 |
2 files changed, 42 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h index c6832be8356f..b550cc837fe1 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h @@ -287,6 +287,10 @@ int smu_v11_0_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *value); +int smu_v11_0_set_single_dpm_table(struct smu_context *smu, + enum smu_clk_type clk_type, + struct smu_11_0_dpm_table *single_dpm_table); + int smu_v11_0_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min_value, diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 6b492a4dfb8e..5ba69cf11d8a 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1970,6 +1970,44 @@ int smu_v11_0_get_dpm_level_count(struct smu_context *smu, value); } +int smu_v11_0_set_single_dpm_table(struct smu_context *smu, + enum smu_clk_type clk_type, + struct smu_11_0_dpm_table *single_dpm_table) +{ + int ret = 0; + uint32_t clk; + int i; + + ret = smu_v11_0_get_dpm_level_count(smu, + clk_type, + &single_dpm_table->count); + if (ret) { + dev_err(smu->adev->dev, "[%s] failed to get dpm levels!\n", __func__); + return ret; + } + + for (i = 0; i < single_dpm_table->count; i++) { + ret = smu_v11_0_get_dpm_freq_by_index(smu, + clk_type, + i, + &clk); + if (ret) { + dev_err(smu->adev->dev, "[%s] failed to get dpm freq by index!\n", __func__); + return ret; + } + + single_dpm_table->dpm_levels[i].value = clk; + single_dpm_table->dpm_levels[i].enabled = true; + + if (i == 0) + single_dpm_table->min = clk; + else if (i == single_dpm_table->count - 1) + single_dpm_table->max = clk; + } + + return 0; +} + int smu_v11_0_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min_value, |