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authorThierry Reding <treding@nvidia.com>2022-04-29 10:22:41 +0200
committerWill Deacon <will@kernel.org>2022-05-06 16:29:27 +0100
commitc02bda09f91a340bc9fae4e236ce3e3ec6b1c9ff (patch)
treefbc54db61ce22ea3133adc46df979b9a2870c875
parentd044023e219d415d2af87e5e48e9e03488ad145c (diff)
downloadlinux-c02bda09f91a340bc9fae4e236ce3e3ec6b1c9ff.tar.bz2
dt-bindings: arm-smmu: Document nvidia,memory-controller property
On NVIDIA SoC's the ARM SMMU needs to interact with the memory controller in order to map memory clients to the corresponding stream IDs. Document how the nvidia,memory-controller property can be used to achieve this. Note that this is a backwards-incompatible change that is, however, necessary to ensure correctness. Without the new property, most of the devices would still work but it is not guaranteed that all will. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220429082243.496000-2-thierry.reding@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/iommu/arm,smmu.yaml17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 96891576a575..ffd537a94a15 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -159,6 +159,17 @@ properties:
power-domains:
maxItems: 1
+ nvidia,memory-controller:
+ description: |
+ A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.
+ The memory controller needs to be programmed with a mapping of memory
+ client IDs to ARM SMMU stream IDs.
+
+ If this property is absent, the mapping programmed by early firmware
+ will be used and it is not guaranteed that IOMMU translations will be
+ enabled for any given device.
+ $ref: /schemas/types.yaml#/definitions/phandle
+
required:
- compatible
- reg
@@ -181,6 +192,12 @@ allOf:
reg:
minItems: 1
maxItems: 2
+
+ # The reference to the memory controller is required to ensure that the
+ # memory client to stream ID mapping can be done synchronously with the
+ # IOMMU attachment.
+ required:
+ - nvidia,memory-controller
else:
properties:
reg: