diff options
| author | Clinton Taylor <Clinton.A.Taylor@intel.com> | 2021-05-06 19:19:23 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2021-05-07 10:51:42 +0300 |
| commit | bdd27cad22379a665fe246a0f9b37acb502df0fe (patch) | |
| tree | 960c8c162b0c583f062346b411c5607b2de684fa | |
| parent | 760759f2cf711be86f360e6a7cdd01a9d4252b8e (diff) | |
| download | linux-bdd27cad22379a665fe246a0f9b37acb502df0fe.tar.bz2 | |
drm/i915/adl_p: ADL_P device info enabling
Add ADL-P to the device_info table and support MACROS.
Bspec: 49185, 55372, 55373
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-4-imre.deak@intel.com
| -rw-r--r-- | arch/x86/kernel/early-quirks.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_device_info.h | 1 |
5 files changed, 16 insertions, 0 deletions
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6edd1e2ee8af..b553ffe9b985 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -552,6 +552,7 @@ static const struct pci_device_id intel_early_ids[] __initconst = { INTEL_TGL_12_IDS(&gen11_early_ops), INTEL_RKL_IDS(&gen11_early_ops), INTEL_ADLS_IDS(&gen11_early_ops), + INTEL_ADLP_IDS(&gen11_early_ops), }; struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0, 0); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e20294e9227a..e5513e19beb5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1392,6 +1392,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE) #define IS_DG1(dev_priv) IS_PLATFORM(dev_priv, INTEL_DG1) #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S) +#define IS_ALDERLAKE_P(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_P) #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \ (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00) #define IS_BDW_ULT(dev_priv) \ diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 1417e26bb1b6..1fd1b482ec9f 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -949,6 +949,17 @@ static const struct intel_device_info adl_s_info = { .dbuf.size = 4096, \ .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4) +static const struct intel_device_info adl_p_info = { + GEN12_FEATURES, + XE_LPD_FEATURES, + PLATFORM(INTEL_ALDERLAKE_P), + .require_force_probe = 1, + .platform_engine_mask = + BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), + .ppgtt_size = 48, + .dma_mask_size = 39, +}; + #undef GEN #undef PLATFORM @@ -1026,6 +1037,7 @@ static const struct pci_device_id pciidlist[] = { INTEL_TGL_12_IDS(&tgl_info), INTEL_RKL_IDS(&rkl_info), INTEL_ADLS_IDS(&adl_s_info), + INTEL_ADLP_IDS(&adl_p_info), {0, 0, 0} }; MODULE_DEVICE_TABLE(pci, pciidlist); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 6a351a709417..3b975ce1ff59 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -67,6 +67,7 @@ static const char * const platform_names[] = { PLATFORM_NAME(ROCKETLAKE), PLATFORM_NAME(DG1), PLATFORM_NAME(ALDERLAKE_S), + PLATFORM_NAME(ALDERLAKE_P), }; #undef PLATFORM_NAME diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 6aefe4fde197..e98b36959736 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -87,6 +87,7 @@ enum intel_platform { INTEL_ROCKETLAKE, INTEL_DG1, INTEL_ALDERLAKE_S, + INTEL_ALDERLAKE_P, INTEL_MAX_PLATFORMS }; |