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authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>2020-08-17 23:29:21 +0800
committerVinod Koul <vkoul@kernel.org>2020-08-18 12:01:05 +0530
commitab996b2971d76e1602064b0ae4eb9af5def085d8 (patch)
tree12054762631380d0ca1f56b549a8302e27735392
parentcaf688192bc452c0fdd04920c3ed2405a57ac10b (diff)
downloadlinux-ab996b2971d76e1602064b0ae4eb9af5def085d8.tar.bz2
soundwire: intel_init: handle power rail dependencies for clock stop mode
When none of the clock stop quirks is specified, the Master IP will assume the context is preserved and will not reset the Bus and restart enumeration. Due to power rail dependencies, the HDaudio controller needs to remain powered and prevented from executing its pm_runtime suspend routine. This choice of course has a power impact, and this mode should only be selected when latency requirements are critical or the parent device can enter D0ix modes. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20200817152923.3259-11-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r--drivers/soundwire/intel_init.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/soundwire/intel_init.c b/drivers/soundwire/intel_init.c
index dd1050743dca..add46d8fc85c 100644
--- a/drivers/soundwire/intel_init.c
+++ b/drivers/soundwire/intel_init.c
@@ -73,6 +73,9 @@ static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
pm_runtime_disable(&link->pdev->dev);
platform_device_unregister(link->pdev);
}
+
+ if (!link->clock_stop_quirks)
+ pm_runtime_put_noidle(link->dev);
}
return 0;
@@ -338,6 +341,16 @@ sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
continue;
intel_master_startup(link->pdev);
+
+ if (!link->clock_stop_quirks) {
+ /*
+ * we need to prevent the parent PCI device
+ * from entering pm_runtime suspend, so that
+ * power rails to the SoundWire IP are not
+ * turned off.
+ */
+ pm_runtime_get_noresume(link->dev);
+ }
}
return 0;