diff options
| author | Dillon Varone <dillon.varone@amd.com> | 2022-03-08 15:32:06 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-03 16:43:49 -0400 |
| commit | a839a73b18157fe30eb4acd2a1f1ffdb890762ff (patch) | |
| tree | 72bcca2be0090ab70847748e8572c7681836de60 | |
| parent | 542a0f2ef9ea2ccfadf2b8a3b53368c61fc97a0f (diff) | |
| download | linux-a839a73b18157fe30eb4acd2a1f1ffdb890762ff.tar.bz2 | |
drm/amd/display: Add guard for FCLK pstate message to PMFW for DCN321
[WHY?]
DCN321 does not support FCLK DPM, and thus it should not send messages to
PMFW regarding it.
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c index 419cc83b3d21..4ff12b816614 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c @@ -346,7 +346,8 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base, clk_mgr_base->bw_params->clk_table.entries[clk_mgr_base->bw_params->clk_table.num_entries - 1].memclk_mhz); } - if (should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support)) { + if (should_update_pstate_support(safe_to_lower, fclk_p_state_change_support, clk_mgr_base->clks.fclk_p_state_change_support) && + clk_mgr_base->ctx->dce_version != DCN_VERSION_3_21) { clk_mgr_base->clks.fclk_p_state_change_support = fclk_p_state_change_support; /* To disable FCLK P-state switching, send FCLK_PSTATE_NOTSUPPORTED message to PMFW */ |