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authorCharlene Liu <charlene.liu@amd.com>2018-07-16 14:05:11 -0400
committerAlex Deucher <alexander.deucher@amd.com>2018-08-27 11:09:48 -0500
commita465feae60dc615d0e363ea5809b95a433b259d4 (patch)
tree8bd7f6888b2ed765f3a70afbbcfe375b297a08dd
parentf688b614b64368ce1681f28cb6f2ff53e1eb8462 (diff)
downloadlinux-a465feae60dc615d0e363ea5809b95a433b259d4.tar.bz2
drm/amd/display: pass compat_level to hubp
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c3
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h3
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c4
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h3
4 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 2138cd3c5d1d..fa1bacd7ba3a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -485,7 +485,8 @@ void hubp1_program_surface_config(
union plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
- bool horizontal_mirror)
+ bool horizontal_mirror,
+ unsigned int compat_level)
{
hubp1_dcc_control(hubp, dcc->enable, dcc->grph.independent_64b_blks);
hubp1_program_tiling(hubp, tiling_info, format);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index f689feace82d..48c1907c78c6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -664,7 +664,8 @@ void hubp1_program_surface_config(
union plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
- bool horizontal_mirror);
+ bool horizontal_mirror,
+ unsigned int compat_level);
void hubp1_program_deadline(
struct hubp *hubp,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index cfcc54f2ce65..41f6595891f1 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2004,6 +2004,7 @@ static void update_dchubp_dpp(
struct dpp *dpp = pipe_ctx->plane_res.dpp;
struct dc_plane_state *plane_state = pipe_ctx->plane_state;
union plane_size size = plane_state->plane_size;
+ unsigned int compat_level = 0;
/* depends on DML calculation, DPP clock value may change dynamically */
/* If request max dpp clk is lower than current dispclk, no need to
@@ -2095,7 +2096,8 @@ static void update_dchubp_dpp(
&size,
plane_state->rotation,
&plane_state->dcc,
- plane_state->horizontal_mirror);
+ plane_state->horizontal_mirror,
+ compat_level);
}
hubp->power_gated = false;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 4f3f9e68ccfa..334c48cdafdc 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -96,7 +96,8 @@ struct hubp_funcs {
union plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
- bool horizontal_mirror);
+ bool horizontal_mirror,
+ unsigned int compa_level);
bool (*hubp_is_flip_pending)(struct hubp *hubp);