diff options
| author | Russell King <rmk+kernel@armlinux.org.uk> | 2017-07-08 10:16:48 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@armlinux.org.uk> | 2017-12-08 12:18:46 +0000 |
| commit | a3f6a18f9a74b64209f8ab957dd94ade8bf5a7b2 (patch) | |
| tree | 3b864dcbd95f86aed5103a5819f30bc9c5fbe960 | |
| parent | d76dcc7236b8b1b8c2c61b380e7d803d47b20ffa (diff) | |
| download | linux-a3f6a18f9a74b64209f8ab957dd94ade8bf5a7b2.tar.bz2 | |
drm/armada: move overlay plane work out from under spinlock
Move the overlay plane work out from under the spinlock so that both the
primary and overlay planes run their work in the same context. This is
necessary so that we can use frame works with the overlay plane.
However, we must update the CRTC registers under the spinlock, so fix up
the overlay code for that.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
| -rw-r--r-- | drivers/gpu/drm/armada/armada_crtc.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/armada/armada_overlay.c | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index bedcaed81ffa..be3fd82ef516 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -471,11 +471,11 @@ static void armada_drm_crtc_irq(struct armada_crtc *dcrtc, u32 stat) if (stat & VSYNC_IRQ) drm_crtc_handle_vblank(&dcrtc->crtc); - spin_lock(&dcrtc->irq_lock); ovl_plane = dcrtc->plane; if (ovl_plane) armada_drm_plane_work_run(dcrtc, ovl_plane); + spin_lock(&dcrtc->irq_lock); if (stat & GRA_FRAME_IRQ && dcrtc->interlaced) { int i = stat & GRA_FRAME_IRQ0 ? 0 : 1; uint32_t val; diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c index 995463cd542d..04746ade74e6 100644 --- a/drivers/gpu/drm/armada/armada_overlay.c +++ b/drivers/gpu/drm/armada/armada_overlay.c @@ -84,10 +84,14 @@ static void armada_ovl_plane_work(struct armada_crtc *dcrtc, { struct armada_ovl_plane *dplane = container_of(work->plane, struct armada_ovl_plane, base.base); + unsigned long flags; trace_armada_ovl_plane_work(&dcrtc->crtc, work->plane); + spin_lock_irqsave(&dcrtc->irq_lock, flags); armada_drm_crtc_update_regs(dcrtc, dplane->vbl.regs); + spin_unlock_irqrestore(&dcrtc->irq_lock, flags); + armada_ovl_retire_fb(dplane, NULL); } |