diff options
| author | Alex Sierra <alex.sierra@amd.com> | 2021-01-15 17:03:18 -0600 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-03-23 22:57:59 -0400 |
| commit | 9a9c59a8f4f4478d5951eb0bded1d17b936aad6e (patch) | |
| tree | c98b7edb30f6d4b777eb8c966fdb476fbe0b7510 | |
| parent | b672cb1eee59efe6ca5bb2a2ce90060a22860558 (diff) | |
| download | linux-9a9c59a8f4f4478d5951eb0bded1d17b936aad6e.tar.bz2 | |
drm/amdgpu: enable 48-bit IH timestamp counter
By default this timestamp is 32 bit counter. It gets
overflowed in around 10 minutes.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c index 101416c646c7..6c3cb3513b98 100644 --- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c @@ -107,6 +107,8 @@ static int vega20_ih_toggle_ring_interrupts(struct amdgpu_device *adev, tmp = RREG32(ih_regs->ih_rb_cntl); tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_ENABLE, (enable ? 1 : 0)); + tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_GPU_TS_ENABLE, 1); + /* enable_intr field is only valid in ring0 */ if (ih == &adev->irq.ih) tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0)); |