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author | Amit Cohen <amitc@mellanox.com> | 2020-07-14 17:20:55 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2020-07-14 14:50:49 -0700 |
commit | 95c68833fa1db2a05496f8c2bc0171a14210b047 (patch) | |
tree | 494cbbabfe88d563fd9fdb7f00d573f90cf1d2c6 | |
parent | ef8d57e6b7f2b26e9def159749fc3d0d3df4ccfd (diff) | |
download | linux-95c68833fa1db2a05496f8c2bc0171a14210b047.tar.bz2 |
mlxsw: reg: add mirroring_pid_base to MOGCR register
Allow setting mirroring_pid_base using MOGCR register.
Signed-off-by: Amit Cohen <amitc@mellanox.com>
Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/reg.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index e460d9d05d81..6af44aee501d 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -9521,6 +9521,14 @@ MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1); */ MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1); +/* reg_mogcr_mirroring_pid_base + * Base policer id for mirroring policers. + * Must have an even value (e.g. 1000, not 1001). + * Reserved when SwitchX/-2, Switch-IB/2, Spectrum-1 and Quantum. + * Access: RW + */ +MLXSW_ITEM32(reg, mogcr, mirroring_pid_base, 0x0C, 0, 14); + /* MPAGR - Monitoring Port Analyzer Global Register * ------------------------------------------------ * This register is used for global port analyzer configurations. |