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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2020-12-08 16:03:36 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2020-12-09 21:53:29 +0100 |
| commit | 8f95c13228116b56d42736b0849a55b97267806c (patch) | |
| tree | 76fd9ebe6bebb58c670fcfdd382cd58f6d9c1fcd | |
| parent | a5df4c14b9a9c576cd8229deb87da21aeb8aa82c (diff) | |
| download | linux-8f95c13228116b56d42736b0849a55b97267806c.tar.bz2 | |
i2c: designware: Make register offsets all of the same width
For the sake of consistency add leading 0 to first register offsets
to make them all of the same width.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
| -rw-r--r-- | drivers/i2c/busses/i2c-designware-core.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index c129074be63c..85307cfa7109 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -41,9 +41,9 @@ /* * Registers offset */ -#define DW_IC_CON 0x0 -#define DW_IC_TAR 0x4 -#define DW_IC_SAR 0x8 +#define DW_IC_CON 0x00 +#define DW_IC_TAR 0x04 +#define DW_IC_SAR 0x08 #define DW_IC_DATA_CMD 0x10 #define DW_IC_SS_SCL_HCNT 0x14 #define DW_IC_SS_SCL_LCNT 0x18 |