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authorKarl Beldan <karl.beldan@gmail.com>2009-05-11 23:49:41 +0200
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-05-13 19:16:00 +0100
commit8c10dc4f54d315ce801dc9ef4018aab8d0d75a7b (patch)
tree03619108d7862575a3bb393bce50f9918496f91f
parent13e2c86c20f5d07b20d5a6dee24bcdd2b30b859f (diff)
downloadlinux-8c10dc4f54d315ce801dc9ef4018aab8d0d75a7b.tar.bz2
ASoC: pxa2xx-i2s: Proper initialization
Reset FIFO logic and registers, and make sure REC and RPL functions along with FIFO service are disabled at probe. Signed-off-by: Karl Beldan <karl.beldan@mobile-devices.fr> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/pxa/pxa2xx-i2s.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c
index 60145770aeba..fce8a2894e2c 100644
--- a/sound/soc/pxa/pxa2xx-i2s.c
+++ b/sound/soc/pxa/pxa2xx-i2s.c
@@ -347,6 +347,19 @@ static int pxa2xx_i2s_probe(struct platform_device *dev)
if (ret != 0)
clk_put(clk_i2s);
+ /*
+ * PXA Developer's Manual:
+ * If SACR0[ENB] is toggled in the middle of a normal operation,
+ * the SACR0[RST] bit must also be set and cleared to reset all
+ * I2S controller registers.
+ */
+ SACR0 = SACR0_RST;
+ SACR0 = 0;
+ /* Make sure RPL and REC are disabled */
+ SACR1 = SACR1_DRPL | SACR1_DREC;
+ /* Along with FIFO servicing */
+ SAIMR &= ~(SAIMR_RFS | SAIMR_TFS);
+
return ret;
}