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authorMark Rutland <mark.rutland@arm.com>2013-06-20 14:02:21 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-06-24 15:23:56 +0100
commit8121cf312a1908f67173ec3773da1688e04437e7 (patch)
tree809f6f4d1bfefb6bc3696ef04d6f5c281c8524f1
parentc5f927a6f62196226915f12194c9d0df4e2210d7 (diff)
downloadlinux-8121cf312a1908f67173ec3773da1688e04437e7.tar.bz2
ARM: 7766/1: versatile: don't mark pen as __INIT
When booting fewer cores than are physically present on a versatile platform (e.g. when passing maxcpus=N on the command line), some secondary cores may remain in the holding pen, which is marked __INIT, as each CPU's gic cpumask is initialised to 0xff, and thus an IPI to any CPU will wake up *all* secondaries. This behaviour is crucial to the GIC cpumask self-discovery. Late in the boot process, the memory comprising the holding pen will be released to the kernel for more general use, and may be overwritten with arbitrary data, which can cause the held secondaries to start behaving unpredictably. This can lead to all manner of odd behaviour from the kernel. As preventing cpus from entering the pen would require invasive changes to the GIC driver and to existing dts used in the wild, we instead remove the __INIT marker from the pen, keeping it around and leaving the unused secondary CPUs dormant. Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/175039.html Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/plat-versatile/headsmp.S2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/plat-versatile/headsmp.S b/arch/arm/plat-versatile/headsmp.S
index b178d44e9eaa..2677bc3762d7 100644
--- a/arch/arm/plat-versatile/headsmp.S
+++ b/arch/arm/plat-versatile/headsmp.S
@@ -11,8 +11,6 @@
#include <linux/linkage.h>
#include <linux/init.h>
- __INIT
-
/*
* Realview/Versatile Express specific entry point for secondary CPUs.
* This provides a "holding pen" into which all secondary cores are held