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authorChen-Yu Tsai <wens@csie.org>2019-02-06 11:32:36 +0800
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-02-07 16:51:12 +0100
commit6fa39a5405db9a2e8621b49fd2d46fd585225853 (patch)
treec831b9154862d41f04a89e16da4f14f497e1d8f0
parente78adcfe48daf7b322c09aa19930b8051adf04c8 (diff)
downloadlinux-6fa39a5405db9a2e8621b49fd2d46fd585225853.tar.bz2
ARM: dts: sun9i: Add A80 GMAC gigabit ethernet controller node
The A80 has the same GMAC found on the A31 SoC. Add a device node, and an alias for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 724ca3b850c8..f0c7acf2d0a4 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -56,6 +56,10 @@
#size-cells = <2>;
interrupt-parent = <&gic>;
+ aliases {
+ ethernet0 = &gmac;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -314,6 +318,23 @@
};
};
+ gmac: ethernet@830000 {
+ compatible = "allwinner,sun7i-a20-gmac";
+ reg = <0x00830000 0x1054>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&ccu CLK_BUS_GMAC>, <&gmac_tx_clk>;
+ clock-names = "stmmaceth", "allwinner_gmac_tx";
+ resets = <&ccu RST_BUS_GMAC>;
+ reset-names = "stmmaceth";
+ snps,pbl = <2>;
+ snps,fixed-burst;
+ snps,force_sf_dma_mode;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ehci0: usb@a00000 {
compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
reg = <0x00a00000 0x100>;