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authorDavid Daney <ddaney@caviumnetworks.com>2009-01-02 13:50:00 +0000
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-02 10:19:43 -0800
commit6b06f19151c335ee0c5b61839fa4e6838182ebb8 (patch)
treeb4b6e263320e7f06597c9170e691d16a42efd876
parent8e23fcc89c8091790903927449f8efb9b4e23960 (diff)
downloadlinux-6b06f19151c335ee0c5b61839fa4e6838182ebb8.tar.bz2
Serial: UART driver changes for Cavium OCTEON.
Cavium UART implementation is not covered by existing uart_configS. Define a new uart_config (PORT_OCTEON) which is specified by OCTEON platform device registration code. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/serial/8250.c7
-rw-r--r--include/linux/serial_core.h3
2 files changed, 9 insertions, 1 deletions
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 3ae497422db5..daa00567bc44 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -279,6 +279,13 @@ static const struct serial8250_config uart_config[] = {
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO,
},
+ [PORT_OCTEON] = {
+ .name = "OCTEON",
+ .fifo_size = 64,
+ .tx_loadsz = 64,
+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+ .flags = UART_CAP_FIFO,
+ },
};
#if defined (CONFIG_SERIAL_8250_AU1X00)
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index f155252f148c..b4199841f1fc 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -40,7 +40,8 @@
#define PORT_NS16550A 14
#define PORT_XSCALE 15
#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
-#define PORT_MAX_8250 16 /* max port ID */
+#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
+#define PORT_MAX_8250 17 /* max port ID */
/*
* ARM specific type numbers. These are not currently guaranteed