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| author | Jani Nikula <jani.nikula@intel.com> | 2021-02-11 16:52:15 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-02-22 18:06:18 +0200 |
| commit | 63e654f65d7cf588813c5b75beafe2d3114719b0 (patch) | |
| tree | 8c7e25e233d5705196826cb83ea5fcac5d539748 | |
| parent | de46dbe4b755c24e11655f69abb008a9573c9cba (diff) | |
| download | linux-63e654f65d7cf588813c5b75beafe2d3114719b0.tar.bz2 | |
drm/i915/reg: add stream splitter configuration definitions
The splitter configuration is required for eDP MSO.
Bspec: 50174
Cc: Nischal Varide <nischal.varide@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/443ad1fbf908800ee4e09315cb6a7ba26c64d136.1613054234.git.jani.nikula@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4977bede0711..ca549d77657b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -11447,6 +11447,9 @@ enum skl_power_gate { #define BIG_JOINER_ENABLE (1 << 29) #define MASTER_BIG_JOINER_ENABLE (1 << 28) #define VGA_CENTERING_ENABLE (1 << 27) +#define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25) +#define SPLITTER_CONFIGURATION_2_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0) +#define SPLITTER_CONFIGURATION_4_SEGMENT REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1) #define _ICL_PIPE_DSS_CTL2_PB 0x78204 #define _ICL_PIPE_DSS_CTL2_PC 0x78404 |