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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-05-02 20:01:55 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-05-06 11:09:34 +0200 |
| commit | 470218e29daf7f1de9f4d1af16c7ecf54344f6a1 (patch) | |
| tree | 0c7bd90b1da8d7f09ba438db399c67b612d0d292 | |
| parent | c2ff5c0282f94c1f1f81007e1fa7378fe95f46d3 (diff) | |
| download | linux-470218e29daf7f1de9f4d1af16c7ecf54344f6a1.tar.bz2 | |
arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
Add SPI Multi I/O Bus controller node to R9A07G043 (RZ/G2UL) SoC DTSI.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220502190155.84496-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi index 9048edb5e2b1..b31fb713ae4d 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi @@ -498,12 +498,19 @@ }; sbc: spi@10060000 { + compatible = "renesas,r9a07g043-rpc-if", + "renesas,rzg2l-rpc-if"; reg = <0 0x10060000 0 0x10000>, <0 0x20000000 0 0x10000000>, <0 0x10070000 0 0x10000>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD R9A07G043_SPI_CLK2>, + <&cpg CPG_MOD R9A07G043_SPI_CLK>; + resets = <&cpg R9A07G043_SPI_RST>; + power-domains = <&cpg>; #address-cells = <1>; #size-cells = <0>; - /* place holder */ + status = "disabled"; }; cpg: clock-controller@11010000 { |