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authorHeiko Stuebner <heiko@sntech.de>2013-06-17 22:17:16 +0200
committerHeiko Stuebner <heiko@sntech.de>2014-03-01 17:21:53 +0100
commit46b8219c519be424ab96b5b7fabee171c1e6b4c7 (patch)
tree62b96c33951890d103a9c28ae785b8a0804c029b
parentde18e01478d3a65112521de04b67e9029b99f55d (diff)
downloadlinux-46b8219c519be424ab96b5b7fabee171c1e6b4c7.tar.bz2
ARM: rockchip: add power-management-unit
The pmu is needed to bring up the cores during smp operations and later also other system parts. Therefore add a node and documentation for it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip/pmu.txt16
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi5
2 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.txt b/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
new file mode 100644
index 000000000000..3ee9b428b2f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip/pmu.txt
@@ -0,0 +1,16 @@
+Rockchip power-management-unit:
+-------------------------------
+
+The pmu is used to turn off and on different power domains of the SoCs
+This includes the power to the CPU cores.
+
+Required node properties:
+- compatible value : = "rockchip,rk3066-pmu";
+- reg : physical base address and the size of the registers window
+
+Example:
+
+ pmu@20004000 {
+ compatible = "rockchip,rk3066-pmu";
+ reg = <0x20004000 0x100>;
+ };
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 0a3d5b131eba..26e5a968d49d 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -31,6 +31,11 @@
reg = <0x1013c000 0x100>;
};
+ pmu@20004000 {
+ compatible = "rockchip,rk3066-pmu";
+ reg = <0x20004000 0x100>;
+ };
+
gic: interrupt-controller@1013d000 {
compatible = "arm,cortex-a9-gic";
interrupt-controller;