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author | Kevin Wang <kevin1.wang@amd.com> | 2019-04-23 11:29:11 +0800 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:30 -0500 |
commit | 4228b6015d659c63cd8e4f24fc1db3a0c23e56a1 (patch) | |
tree | 3c95d76f38c3f5822e7c99adbd2c98b8ef836bae | |
parent | 6b1b7b5bf03db9fb2cac485eee5289edf2bc5b61 (diff) | |
download | linux-4228b6015d659c63cd8e4f24fc1db3a0c23e56a1.tar.bz2 |
drm/amd/powerplay: add function is_dpm_running for navi10
add callback function is_dpm_running for navi10 asic
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 52a6352b5795..c4da5af1f503 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -35,6 +35,17 @@ #include "smu_v11_0_pptable.h" #include "smu_v11_0_ppsmc.h" +#define FEATURE_MASK(feature) (1UL << feature) +#define SMC_DPM_FEATURE ( \ + FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \ + FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_GFX_PACE_BIT) | \ + FEATURE_MASK(FEATURE_DPM_UCLK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_LINK_BIT) | \ + FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)) + #define MSG_MAP(msg, index) \ [SMU_MSG_##msg] = index @@ -248,7 +259,6 @@ static int navi10_get_pwr_src_index(struct smu_context *smc, uint32_t index) return val; } -#define FEATURE_MASK(feature) (1UL << feature) static int navi10_get_allowed_feature_mask(struct smu_context *smu, uint32_t *feature_mask, uint32_t num) @@ -786,6 +796,17 @@ static int navi10_get_current_activity_percent(struct smu_context *smu, return 0; } +static bool navi10_is_dpm_running(struct smu_context *smu) +{ + int ret = 0; + uint32_t feature_mask[2]; + unsigned long feature_enabled; + ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); + feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | + ((uint64_t)feature_mask[1] << 32)); + return !!(feature_enabled & SMC_DPM_FEATURE); +} + static const struct pptable_funcs navi10_ppt_funcs = { .tables_init = navi10_tables_init, .alloc_dpm_context = navi10_allocate_dpm_context, @@ -811,6 +832,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { .unforce_dpm_levels = navi10_unforce_dpm_levels, .get_gpu_power = navi10_get_gpu_power, .get_current_activity_percent = navi10_get_current_activity_percent, + .is_dpm_running = navi10_is_dpm_running, }; void navi10_set_ppt_funcs(struct smu_context *smu) |