diff options
| author | Likun Gao <Likun.Gao@amd.com> | 2022-05-06 14:53:31 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-10 17:53:12 -0400 |
| commit | 41967850e4f0720f0b472beb84b908957cbc1ebe (patch) | |
| tree | b9171b1da6a55ed5e8500d189803e30d5e331b2e | |
| parent | 74c9b2e704c99d09e3b7e6928df9d8d5891b5174 (diff) | |
| download | linux-41967850e4f0720f0b472beb84b908957cbc1ebe.tar.bz2 | |
drm/amdgpu: support memory power gating for lsdma
Support memory power gating control for LSDMA.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc21.c | 12 |
3 files changed, 27 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h index 544dff63c304..c61ba58c5ee0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.h @@ -33,6 +33,7 @@ struct amdgpu_lsdma_funcs { uint64_t dst_addr, uint64_t size); int (*fill_mem)(struct amdgpu_device *adev, uint64_t dst_addr, uint32_t data, uint64_t size); + void (*update_memory_power_gating)(struct amdgpu_device *adev, bool enable); }; int amdgpu_lsdma_copy_mem(struct amdgpu_device *adev, uint64_t src_addr, diff --git a/drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c index b4adb94a080b..1a285b531881 100644 --- a/drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.c @@ -101,7 +101,21 @@ static int lsdma_v6_0_fill_mem(struct amdgpu_device *adev, return ret; } +static void lsdma_v6_0_update_memory_power_gating(struct amdgpu_device *adev, + bool enable) +{ + uint32_t tmp; + + tmp = RREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL); + tmp = REG_SET_FIELD(tmp, LSDMA_MEM_POWER_CTRL, MEM_POWER_CTRL_EN, 0); + WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp); + + tmp = REG_SET_FIELD(tmp, LSDMA_MEM_POWER_CTRL, MEM_POWER_CTRL_EN, enable); + WREG32_SOC15(LSDMA, 0, regLSDMA_MEM_POWER_CTRL, tmp); +} + const struct amdgpu_lsdma_funcs lsdma_v6_0_funcs = { .copy_mem = lsdma_v6_0_copy_mem, - .fill_mem = lsdma_v6_0_fill_mem + .fill_mem = lsdma_v6_0_fill_mem, + .update_memory_power_gating = lsdma_v6_0_update_memory_power_gating }; diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c index 741ed3ba84d6..3303e02f85d1 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc21.c +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c @@ -676,7 +676,17 @@ static int soc21_common_set_clockgating_state(void *handle, static int soc21_common_set_powergating_state(void *handle, enum amd_powergating_state state) { - /* TODO */ + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + + switch (adev->ip_versions[LSDMA_HWIP][0]) { + case IP_VERSION(6, 0, 0): + adev->lsdma.funcs->update_memory_power_gating(adev, + state == AMD_PG_STATE_GATE); + break; + default: + break; + } + return 0; } |