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authorPhilipp Zabel <p.zabel@pengutronix.de>2016-10-20 15:37:52 +0200
committerPhilipp Zabel <p.zabel@pengutronix.de>2017-03-15 15:28:26 +0100
commit2e9a71218ee34ee652f45cd9d7ba713e1b0155e4 (patch)
treeb341b7299ac59681ce5383f3478670c4df03d8e1
parent03ee3da8ce8d51013e7952108bdb0cd4e973a7de (diff)
downloadlinux-2e9a71218ee34ee652f45cd9d7ba713e1b0155e4.tar.bz2
drm/imx: ipuv3-plane: update overlay plane position also without modeset
Previously, the overlay plane position would only be updated when the plane was first enabled or during a modeset. We can instruct the DP to move the plane also when just updating the EBA. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r--drivers/gpu/drm/imx/ipuv3-plane.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c
index ef31faaf5e16..24819c9c3640 100644
--- a/drivers/gpu/drm/imx/ipuv3-plane.c
+++ b/drivers/gpu/drm/imx/ipuv3-plane.c
@@ -366,10 +366,14 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
struct drm_plane_state *state = plane->state;
struct drm_crtc_state *crtc_state = state->crtc->state;
struct drm_framebuffer *fb = state->fb;
+ struct drm_rect *dst = &state->dst;
unsigned long eba, ubo, vbo;
enum ipu_color_space ics;
int active;
+ if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
+ ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
+
eba = drm_plane_state_to_eba(state);
if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
@@ -390,8 +394,6 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
ics = ipu_drm_fourcc_to_colorspace(state->fb->format->format);
ipu_dp_setup_channel(ipu_plane->dp, ics,
IPUV3_COLORSPACE_UNKNOWN);
- ipu_dp_set_window_pos(ipu_plane->dp,
- state->dst.x1, state->dst.y1);
/* Enable local alpha on partial plane */
switch (state->fb->format->format) {
case DRM_FORMAT_ARGB1555:
@@ -411,7 +413,7 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
}
}
- ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(&state->dst));
+ ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
ipu_cpmem_zero(ipu_plane->ipu_ch);
ipu_cpmem_set_resolution(ipu_plane->ipu_ch,